From: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
To: qemu-devel@nongnu.org
Cc: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
Subject: [Qemu-devel] [PATCH] x86: Fixed incorrect segment base address addition
Date: Mon, 2 Jul 2012 12:29:27 +0200 [thread overview]
Message-ID: <1341224967-30471-1-git-send-email-vitaly.chipounov@epfl.ch> (raw)
An instruction with address and segment size override triggers the bug.
inc dword ptr gs:260h[ebx*4] gets incorrectly translated to:
(uint32_t)(gs.base + ebx * 4 + 0x260)
instead of
gs.base + (uint32_t)(ebx * 4 + 0x260)
Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
---
target-i386/translate.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index a902f4a..9ca7375 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -459,10 +459,10 @@ static inline void gen_op_movl_A0_seg(int reg)
static inline void gen_op_addl_A0_seg(int reg)
{
tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, segs[reg].base));
- tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
#ifdef TARGET_X86_64
tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
#endif
+ tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
}
#ifdef TARGET_X86_64
--
1.7.4.1
next reply other threads:[~2012-07-02 10:29 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-02 10:29 Vitaly Chipounov [this message]
2012-07-02 15:18 ` [Qemu-devel] [PATCH] x86: Fixed incorrect segment base address addition Max Filippov
2012-07-02 22:09 ` Vitaly Chipounov
2012-07-02 22:20 ` [Qemu-devel] [PATCH v2] x86: Fixed incorrect segment base address addition in 64-bits mode Vitaly Chipounov
2012-07-03 12:52 ` Max Filippov
2012-07-29 9:38 ` Blue Swirl
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