From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:48101) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Smtbm-0008Oj-T0 for qemu-devel@nongnu.org; Thu, 05 Jul 2012 17:29:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Smtbl-0001wI-0U for qemu-devel@nongnu.org; Thu, 05 Jul 2012 17:29:06 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:38077) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Smtbk-0001vS-PV for qemu-devel@nongnu.org; Thu, 05 Jul 2012 17:29:04 -0400 From: Peter Maydell Date: Thu, 5 Jul 2012 22:29:00 +0100 Message-Id: <1341523740-22711-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1341523740-22711-1-git-send-email-peter.maydell@linaro.org> References: <1341523740-22711-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 3/3] target-i386: make it clearer that op table accesses don't overrun List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Stefan Weil , patches@linaro.org Rephrase some of the expressions used to select an entry in the SSE op table arrays so that it's clearer that they don't overrun the op table array size. Signed-off-by: Peter Maydell --- target-i386/translate.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 5899e09..1988dae 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2964,16 +2964,16 @@ static const SSEFunc_0_pl sse_op_table3aq[] = { static const SSEFunc_i_p sse_op_table3bi[] = { gen_helper_cvttss2si, - gen_helper_cvttsd2si, gen_helper_cvtss2si, + gen_helper_cvttsd2si, gen_helper_cvtsd2si }; #ifdef TARGET_X86_64 static const SSEFunc_l_p sse_op_table3bq[] = { gen_helper_cvttss2sq, - gen_helper_cvttsd2sq, gen_helper_cvtss2sq, + gen_helper_cvttsd2sq, gen_helper_cvtsd2sq }; #endif @@ -3571,12 +3571,12 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) op1_offset = offsetof(CPUX86State,xmm_regs[reg]); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); if (ot == OT_LONG) { - SSEFunc_0_pi sse_fn_pi = sse_op_table3ai[(b >> 8) - 2]; + SSEFunc_0_pi sse_fn_pi = sse_op_table3ai[(b >> 8) & 1]; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); sse_fn_pi(cpu_ptr0, cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 - SSEFunc_0_pl sse_fn_pl = sse_op_table3aq[(b >> 8) - 2]; + SSEFunc_0_pl sse_fn_pl = sse_op_table3aq[(b >> 8) & 1]; sse_fn_pl(cpu_ptr0, cpu_T[0]); #else goto illegal_op; @@ -3635,13 +3635,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset); if (ot == OT_LONG) { SSEFunc_i_p sse_fn_i_p = - sse_op_table3bi[(b >> 8) - 2 + (b & 1) * 2]; + sse_op_table3bi[((b >> 7) & 2) | (b & 1)]; sse_fn_i_p(cpu_tmp2_i32, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 SSEFunc_l_p sse_fn_l_p = - sse_op_table3bq[(b >> 8) - 2 + (b & 1) * 2]; + sse_op_table3bq[((b >> 7) & 2) | (b & 1)]; sse_fn_l_p(cpu_T[0], cpu_ptr0); #else goto illegal_op; -- 1.7.5.4