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From: Peter Maydell <peter.maydell@linaro.org>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>,
	Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 03/15] target-arm: Fix some copy-and-paste errors in cp register names
Date: Thu, 12 Jul 2012 14:36:44 +0100	[thread overview]
Message-ID: <1342100216-1832-4-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1342100216-1832-1-git-send-email-peter.maydell@linaro.org>

Fix a couple of cases where cp register names were copy-and-pasted.
These are harmless since we don't use the name for anything (except
debugging convenience) but could be confusing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
---
 target-arm/helper.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index ca5d8e9..0015bee 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -216,9 +216,9 @@ static const ARMCPRegInfo v6_cp_reginfo[] = {
       .access = PL1_W, .type = ARM_CP_NOP },
     { .name = "ISB", .cp = 15, .crn = 7, .crm = 5, .opc1 = 0, .opc2 = 4,
       .access = PL0_W, .type = ARM_CP_NOP },
-    { .name = "ISB", .cp = 15, .crn = 7, .crm = 10, .opc1 = 0, .opc2 = 4,
+    { .name = "DSB", .cp = 15, .crn = 7, .crm = 10, .opc1 = 0, .opc2 = 4,
       .access = PL0_W, .type = ARM_CP_NOP },
-    { .name = "ISB", .cp = 15, .crn = 7, .crm = 10, .opc1 = 0, .opc2 = 5,
+    { .name = "DMB", .cp = 15, .crn = 7, .crm = 10, .opc1 = 0, .opc2 = 5,
       .access = PL0_W, .type = ARM_CP_NOP },
     { .name = "IFAR", .cp = 15, .crn = 6, .crm = 0, .opc1 = 0, .opc2 = 2,
       .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c6_insn),
@@ -346,7 +346,7 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
      */
     { .name = "DBGDRAR", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0,
       .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
-    { .name = "DBGDRAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
+    { .name = "DBGDSAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
       .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
     /* the old v6 WFI, UNPREDICTABLE in v7 but we choose to NOP */
     { .name = "NOP", .cp = 15, .crn = 7, .crm = 0, .opc1 = 0, .opc2 = 4,
-- 
1.7.1

  parent reply	other threads:[~2012-07-12 13:37 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-12 13:36 [Qemu-devel] [PULL 00/15] target-arm queue Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 01/15] target-arm: Fix CP15 based WFI Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 02/15] target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 Peter Maydell
2012-07-12 13:36 ` Peter Maydell [this message]
2012-07-12 13:36 ` [Qemu-devel] [PATCH 04/15] target-arm: Fix TCG temp handling in 64 bit cp writes Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 05/15] hw/imx_avic.c: Avoid format error when target_phys_addr_t is 64 bits Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 06/15] ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits Peter Maydell
2012-09-05 22:44   ` Jan Kiszka
2012-07-12 13:36 ` [Qemu-devel] [PATCH 07/15] target-arm: Implement privileged-execute-never (PXN) Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 08/15] target-arm: Extend feature flags to 64 bits Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 09/15] target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 10/15] target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 11/15] target-arm: Add 64 bit PAR, TTBR0, TTBR1 " Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 12/15] target-arm: Use target_phys_addr_t in get_phys_addr() Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 13/15] target-arm: Implement long-descriptor PAR format Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 14/15] target-arm: Implement TTBCR changes for LPAE Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 15/15] target-arm: Add support for long format translation table walks Peter Maydell
2012-07-14 12:21 ` [Qemu-devel] [PULL 00/15] target-arm queue Blue Swirl

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