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From: Peter Maydell <peter.maydell@linaro.org>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>,
	Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 08/15] target-arm: Extend feature flags to 64 bits
Date: Thu, 12 Jul 2012 14:36:49 +0100	[thread overview]
Message-ID: <1342100216-1832-9-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1342100216-1832-1-git-send-email-peter.maydell@linaro.org>

Extend feature flags to 64 bits, as we've just run out of space
in the 32 bit integer we were using for them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/cpu.c     |    2 +-
 target-arm/cpu.h     |    6 +++---
 target-arm/machine.c |    4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 526e725..b00f5fa 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -129,7 +129,7 @@ static void arm_cpu_reset(CPUState *s)
 
 static inline void set_feature(CPUARMState *env, int feature)
 {
-    env->features |= 1u << feature;
+    env->features |= 1ULL << feature;
 }
 
 static void arm_cpu_initfn(Object *obj)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 82cad4b..3c5d2be 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -221,7 +221,7 @@ typedef struct CPUARMState {
     /* These fields after the common ones so they are preserved on reset.  */
 
     /* Internal CPU feature flags.  */
-    uint32_t features;
+    uint64_t features;
 
     void *nvic;
     const struct arm_boot_info *boot_info;
@@ -392,7 +392,7 @@ enum arm_features {
 
 static inline int arm_feature(CPUARMState *env, int feature)
 {
-    return (env->features & (1u << feature)) != 0;
+    return (env->features & (1ULL << feature)) != 0;
 }
 
 void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
@@ -638,7 +638,7 @@ static inline CPUARMState *cpu_init(const char *cpu_model)
 #define cpu_signal_handler cpu_arm_signal_handler
 #define cpu_list arm_cpu_list
 
-#define CPU_SAVE_VERSION 7
+#define CPU_SAVE_VERSION 8
 
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel
diff --git a/target-arm/machine.c b/target-arm/machine.c
index a2a75fb..429cbc8 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -60,7 +60,7 @@ void cpu_save(QEMUFile *f, void *opaque)
     qemu_put_be32(f, env->cp15.c15_diagnostic);
     qemu_put_be32(f, env->cp15.c15_power_diagnostic);
 
-    qemu_put_be32(f, env->features);
+    qemu_put_be64(f, env->features);
 
     if (arm_feature(env, ARM_FEATURE_VFP)) {
         for (i = 0;  i < 16; i++) {
@@ -177,7 +177,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
     env->cp15.c15_diagnostic = qemu_get_be32(f);
     env->cp15.c15_power_diagnostic = qemu_get_be32(f);
 
-    env->features = qemu_get_be32(f);
+    env->features = qemu_get_be64(f);
 
     if (arm_feature(env, ARM_FEATURE_VFP)) {
         for (i = 0;  i < 16; i++) {
-- 
1.7.1

  parent reply	other threads:[~2012-07-12 13:37 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-12 13:36 [Qemu-devel] [PULL 00/15] target-arm queue Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 01/15] target-arm: Fix CP15 based WFI Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 02/15] target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 03/15] target-arm: Fix some copy-and-paste errors in cp register names Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 04/15] target-arm: Fix TCG temp handling in 64 bit cp writes Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 05/15] hw/imx_avic.c: Avoid format error when target_phys_addr_t is 64 bits Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 06/15] ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits Peter Maydell
2012-09-05 22:44   ` Jan Kiszka
2012-07-12 13:36 ` [Qemu-devel] [PATCH 07/15] target-arm: Implement privileged-execute-never (PXN) Peter Maydell
2012-07-12 13:36 ` Peter Maydell [this message]
2012-07-12 13:36 ` [Qemu-devel] [PATCH 09/15] target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 10/15] target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 11/15] target-arm: Add 64 bit PAR, TTBR0, TTBR1 " Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 12/15] target-arm: Use target_phys_addr_t in get_phys_addr() Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 13/15] target-arm: Implement long-descriptor PAR format Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 14/15] target-arm: Implement TTBCR changes for LPAE Peter Maydell
2012-07-12 13:36 ` [Qemu-devel] [PATCH 15/15] target-arm: Add support for long format translation table walks Peter Maydell
2012-07-14 12:21 ` [Qemu-devel] [PULL 00/15] target-arm queue Blue Swirl

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