[Qemu-devel] [rfc patch seabios 0/3] s3 improvements

[Qemu-devel] [rfc patch seabios 0/3] s3 improvements

[Gerd Hoffmann]

  Hi,

This patch series carries the dsdt updates needed for the qemu patch
series just posted.

cheers,
  Gerd

Gerd Hoffmann (3):
  wakeup: kbd & mouse
  wakeup: serial
  wakeup: uhci

 src/acpi-dsdt.dsl |   60 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 60 insertions(+), 0 deletions(-)

[Qemu-devel] [rfc patch seabios 1/3] wakeup: kbd & mouse

[Gerd Hoffmann]

Windup gpe bits 0x08 (keyboard) and 0x09 (mouse) for s3 wakeup.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 src/acpi-dsdt.dsl |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
index 2060686..93d0b3d 100644
--- a/src/acpi-dsdt.dsl
+++ b/src/acpi-dsdt.dsl
@@ -372,6 +372,11 @@ DefinitionBlock (
                     })
                     Return (TMP)
                 }
+                /* Power Resources for Wake */
+                Name(_PRW, Package(2) {
+                    0x08,  // GPE bit
+                    0x03,  // S3
+                })
             }
 
 	    /* PS/2 mouse */
@@ -391,6 +396,11 @@ DefinitionBlock (
                     })
                     Return (TMP)
                 }
+                /* Power Resources for Wake */
+                Name(_PRW, Package(2) {
+                    0x09,  // GPE bit
+                    0x03,  // S3
+                })
             }
 
 	    /* PS/2 floppy controller */
@@ -775,9 +785,11 @@ DefinitionBlock (
             Return(0x01)
         }
         Method(_L08) {
+            Notify(\_SB.PCI0.ISA.KBD, 0x80)
             Return(0x01)
         }
         Method(_L09) {
+            Notify(\_SB.PCI0.ISA.MOU, 0x80)
             Return(0x01)
         }
         Method(_L0A) {
-- 
1.7.1

[Qemu-devel] [rfc patch seabios 2/3] wakeup: serial

[Gerd Hoffmann]

Windup gpe bit 0x0a for s3 wakeup.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 src/acpi-dsdt.dsl |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
index 93d0b3d..03efbfd 100644
--- a/src/acpi-dsdt.dsl
+++ b/src/acpi-dsdt.dsl
@@ -479,6 +479,12 @@ DefinitionBlock (
 		    })
 		    Return (BUF0)
 		}
+                /* Power Resources for Wake */
+                Name(_PRW, Package(2) {
+                    0x0a,  // GPE bit
+                    0x03,  // S3
+                })
+
 	    }
 
 	    Device (COM2)
@@ -793,6 +799,7 @@ DefinitionBlock (
             Return(0x01)
         }
         Method(_L0A) {
+            Notify(\_SB.PCI0.ISA.COM1, 0x80)
             Return(0x01)
         }
         Method(_L0B) {
-- 
1.7.1

[Qemu-devel] [rfc patch seabios 3/3] wakeup: uhci

[Gerd Hoffmann]

Windup gpe bit 0x0b for s3 wakeup.  Also add methods to update
the pci config space register 0xc4 which enables/disables wakeup
per usb port.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 src/acpi-dsdt.dsl |   41 +++++++++++++++++++++++++++++++++++++++++
 1 files changed, 41 insertions(+), 0 deletions(-)

diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
index 03efbfd..07e531d 100644
--- a/src/acpi-dsdt.dsl
+++ b/src/acpi-dsdt.dsl
@@ -312,6 +312,46 @@ DefinitionBlock (
 
 
 /****************************************************************
+ * USB
+ ****************************************************************/
+
+    Scope(\_SB.PCI0) {
+        Device (UHCI) {
+            Name (_ADR, 0x00010002)
+
+            OperationRegion (U0CS, PCI_Config, 0xC4, 0x04)
+            Field (U0CS, DWordAcc, NoLock, Preserve)
+            {
+                U0EN,   2,
+                        Offset (0x04)
+            }
+
+            Name (_S3D, 0x03)
+            Name (_S3W, 0x03)
+
+            /* Power Resources for Wake */
+            Name(_PRW, Package(2) {
+                0x0b,  // GPE bit
+                0x03,  // S3
+            })
+
+            /* Power State Wake */
+            Method (_PSW, 1, NotSerialized)
+            {
+                If (Arg0)
+                {
+                    Store (0x03, U0EN)
+                }
+                Else
+                {
+                    Store (0x00, U0EN)
+                }
+            }
+        }
+    }
+
+
+/****************************************************************
  * PIIX3 ISA bridge
  ****************************************************************/
 
@@ -803,6 +843,7 @@ DefinitionBlock (
             Return(0x01)
         }
         Method(_L0B) {
+            Notify(\_SB.PCI0.UHCI, 0x80)
             Return(0x01)
         }
         Method(_L0C) {
-- 
1.7.1