From: Jia Liu <proljc@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v10 04/15] target-or32: Add exception support
Date: Fri, 20 Jul 2012 15:50:42 +0800 [thread overview]
Message-ID: <1342770653-11162-5-git-send-email-proljc@gmail.com> (raw)
In-Reply-To: <1342770653-11162-1-git-send-email-proljc@gmail.com>
Add OpenRISC exception support.
Signed-off-by: Jia Liu <proljc@gmail.com>
---
target-openrisc/Makefile.objs | 4 ++--
target-openrisc/exception.c | 27 +++++++++++++++++++++++++++
target-openrisc/exception.h | 28 ++++++++++++++++++++++++++++
target-openrisc/exception_helper.c | 29 +++++++++++++++++++++++++++++
target-openrisc/helper.h | 3 +++
5 files changed, 89 insertions(+), 2 deletions(-)
create mode 100644 target-openrisc/exception.c
create mode 100644 target-openrisc/exception.h
create mode 100644 target-openrisc/exception_helper.c
diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs
index 74c4b8d..52d0158 100644
--- a/target-openrisc/Makefile.objs
+++ b/target-openrisc/Makefile.objs
@@ -1,3 +1,3 @@
obj-$(CONFIG_SOFTMMU) += machine.o
-obj-y += cpu.o interrupt.o mmu.o translate.o
-obj-y += interrupt_helper.o mmu_helper.o
+obj-y += cpu.o exception.o interrupt.o mmu.o translate.o
+obj-y += exception_helper.o interrupt_helper.o mmu_helper.o
diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c
new file mode 100644
index 0000000..58e53c6
--- /dev/null
+++ b/target-openrisc/exception.c
@@ -0,0 +1,27 @@
+/*
+ * OpenRISC exception.
+ *
+ * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "exception.h"
+
+void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp)
+{
+ cpu->env.exception_index = excp;
+ cpu_loop_exit(&cpu->env);
+}
diff --git a/target-openrisc/exception.h b/target-openrisc/exception.h
new file mode 100644
index 0000000..4b64430
--- /dev/null
+++ b/target-openrisc/exception.h
@@ -0,0 +1,28 @@
+/*
+ * OpenRISC exception header.
+ *
+ * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef QEMU_OPENRISC_EXCP_H
+#define QEMU_OPENRISC_EXCP_H
+
+#include "cpu.h"
+#include "qemu-common.h"
+
+void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp);
+
+#endif /* QEMU_OPENRISC_EXCP_H */
diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c
new file mode 100644
index 0000000..dab4148
--- /dev/null
+++ b/target-openrisc/exception_helper.c
@@ -0,0 +1,29 @@
+/*
+ * OpenRISC exception helper routines
+ *
+ * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "helper.h"
+#include "exception.h"
+
+void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
+{
+ OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env));
+
+ raise_exception(cpu, excp);
+}
diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h
index 7ced5ea..43b23ca 100644
--- a/target-openrisc/helper.h
+++ b/target-openrisc/helper.h
@@ -19,6 +19,9 @@
#include "def-helper.h"
+/* exception */
+DEF_HELPER_FLAGS_2(exception, 0, void, env, i32)
+
/* interrupt */
DEF_HELPER_FLAGS_1(rfe, 0, void, env)
--
1.7.9.5
next prev parent reply other threads:[~2012-07-20 7:52 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-20 7:50 [Qemu-devel] [PATCH v10 00/15] QEMU OpenRISC support Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 01/15] target-or32: Add target stubs and QOM cpu Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 02/15] target-or32: Add MMU support Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 03/15] target-or32: Add interrupt support Jia Liu
2012-07-20 7:50 ` Jia Liu [this message]
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 05/15] target-or32: Add int instruction helpers Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 06/15] target-or32: Add float " Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 07/15] target-or32: Add instruction translation Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 08/15] target-or32: Add PIC support Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 09/15] target-or32: Add timer support Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 10/15] target-or32: Add a IIS dummy board Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 11/15] target-or32: Add system instructions Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 12/15] target-or32: Add gdb stub support Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 13/15] target-or32: Add linux syscall, signal and termbits Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 14/15] target-or32: Add linux user support Jia Liu
2012-07-20 7:50 ` [Qemu-devel] [PATCH v10 15/15] target-or32: Add testcases Jia Liu
2012-07-25 3:11 ` [Qemu-devel] [PATCH v10 00/15] QEMU OpenRISC support Jia Liu
2012-07-28 12:13 ` Blue Swirl
2012-07-29 2:22 ` Jia Liu
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