From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <anthony@codemonkey.ws>,
Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org, Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 06/10] hw/arm_boot.c: Support DTBs which use 64 bit addresses
Date: Fri, 20 Jul 2012 16:00:26 +0100 [thread overview]
Message-ID: <1342796430-16636-7-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1342796430-16636-1-git-send-email-peter.maydell@linaro.org>
Support the case where the device tree blob specifies that
#address-cells and #size-cells are greater than 1. (This
is needed for device trees which can handle 64 bit physical
addresses and thus total RAM sizes over 4GB.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
---
hw/arm_boot.c | 35 ++++++++++++++++++++++++++++++++---
1 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index af71ed6..a6e9143 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -216,11 +216,12 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
{
#ifdef CONFIG_FDT
- uint32_t mem_reg_property[] = { cpu_to_be32(binfo->loader_start),
- cpu_to_be32(binfo->ram_size) };
+ uint32_t *mem_reg_property;
+ uint32_t mem_reg_propsize;
void *fdt = NULL;
char *filename;
int size, rc;
+ uint32_t acells, scells, hival;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
if (!filename) {
@@ -236,8 +237,36 @@ static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
}
g_free(filename);
+ acells = qemu_devtree_getprop_cell(fdt, "/", "#address-cells");
+ scells = qemu_devtree_getprop_cell(fdt, "/", "#size-cells");
+ if (acells == 0 || scells == 0) {
+ fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
+ return -1;
+ }
+
+ mem_reg_propsize = acells + scells;
+ mem_reg_property = g_new0(uint32_t, mem_reg_propsize);
+ mem_reg_property[acells - 1] = cpu_to_be32(binfo->loader_start);
+ hival = cpu_to_be32(binfo->loader_start >> 32);
+ if (acells > 1) {
+ mem_reg_property[acells - 2] = hival;
+ } else if (hival != 0) {
+ fprintf(stderr, "qemu: dtb file not compatible with "
+ "RAM start address > 4GB\n");
+ exit(1);
+ }
+ mem_reg_property[acells + scells - 1] = cpu_to_be32(binfo->ram_size);
+ hival = cpu_to_be32(binfo->ram_size >> 32);
+ if (scells > 1) {
+ mem_reg_property[acells + scells - 2] = hival;
+ } else if (hival != 0) {
+ fprintf(stderr, "qemu: dtb file not compatible with "
+ "RAM size > 4GB\n");
+ exit(1);
+ }
+
rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
- sizeof(mem_reg_property));
+ mem_reg_propsize * sizeof(uint32_t));
if (rc < 0) {
fprintf(stderr, "couldn't set /memory/reg\n");
}
--
1.7.5.4
next prev parent reply other threads:[~2012-07-20 15:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-20 15:00 [Qemu-devel] [PULL 00/10] arm-devs queue Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 01/10] hw/pl011.c: Avoid crash on read when no chr backend present Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 02/10] hw/arm_boot.c: Make ram_size a uint64_t Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 03/10] hw/arm_boot.c: Consistently use ram_size from arm_boot_info struct Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 04/10] hw/arm_boot.c: Check for RAM sizes exceeding ATAGS capacity Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 05/10] device_tree: Add support for reading device tree properties Peter Maydell
2012-07-20 15:00 ` Peter Maydell [this message]
2012-07-20 15:00 ` [Qemu-devel] [PATCH 07/10] hw/vexpress.c: Allow >4GB of RAM for Cortex-A15 daughterboard Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 08/10] hw/exynos4210_rtc.c: Fix calculating for value of year Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 09/10] hw/exynos4210_rtc.c: remove unnecessary code Peter Maydell
2012-07-20 15:00 ` [Qemu-devel] [PATCH 10/10] exynos4210: add Exynos4210 i2c implementation Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1342796430-16636-7-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=anthony@codemonkey.ws \
--cc=blauwirbel@gmail.com \
--cc=paul@codesourcery.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).