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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Crosthwaite <peter.crosthwaite@petalogix.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Paul Brook <paul@codesourcery.com>,
	patches@linaro.org
Subject: [Qemu-devel] [PATCH] hw/armv7m_nvic: Fix incorrect default for num-irqs property
Date: Tue, 24 Jul 2012 11:39:25 +0100	[thread overview]
Message-ID: <1343126365-23371-1-git-send-email-peter.maydell@linaro.org> (raw)

Fix an incorrect default value for the num-irqs property (we were
attempting to override it from the default set by the parent class
but not succeeding, which meant that the lm3s6965evb model would
assert on startup attempting to wire up nonexistent irq lines).
Instead of trying to override the parent's Property array, we
define an instance_init function which runs after default setup
but before user property setting and can just fix up the default
value in the gic_state struct.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/armv7m_nvic.c |   21 ++++++++++++++-------
 1 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
index 4867c1d..6a0832e 100644
--- a/hw/armv7m_nvic.c
+++ b/hw/armv7m_nvic.c
@@ -467,7 +467,7 @@ static int armv7m_nvic_init(SysBusDevice *dev)
     s->gic.num_cpu = 1;
     /* Tell the common code we're an NVIC */
     s->gic.revision = 0xffffffff;
-    s->gic.num_irq = s->num_irq;
+    s->num_irq = s->gic.num_irq;
     nc->parent_init(dev);
     gic_init_irqs_and_distributor(&s->gic, s->num_irq);
     /* The NVIC and system controller register area looks like this:
@@ -498,14 +498,21 @@ static int armv7m_nvic_init(SysBusDevice *dev)
     return 0;
 }
 
-static Property armv7m_nvic_properties[] = {
+static void armv7m_nvic_instance_init(Object *obj)
+{
+    /* We have a different default value for the num-irq property
+     * than our superclass. This function runs after qdev init
+     * has set the defaults from the Property array and before
+     * any user-specified property setting, so just modify the
+     * value in the gic_state struct.
+     */
+    gic_state *s = ARM_GIC_COMMON(obj);
     /* The ARM v7m may have anything from 0 to 496 external interrupt
      * IRQ lines. We default to 64. Other boards may differ and should
-     * set this property appropriately.
+     * set the num-irq property appropriately.
      */
-    DEFINE_PROP_UINT32("num-irq", nvic_state, num_irq, 64),
-    DEFINE_PROP_END_OF_LIST(),
-};
+    s->num_irq = 64;
+}
 
 static void armv7m_nvic_class_init(ObjectClass *klass, void *data)
 {
@@ -518,12 +525,12 @@ static void armv7m_nvic_class_init(ObjectClass *klass, void *data)
     sdc->init = armv7m_nvic_init;
     dc->vmsd  = &vmstate_nvic;
     dc->reset = armv7m_nvic_reset;
-    dc->props = armv7m_nvic_properties;
 }
 
 static TypeInfo armv7m_nvic_info = {
     .name          = TYPE_NVIC,
     .parent        = TYPE_ARM_GIC_COMMON,
+    .instance_init = armv7m_nvic_instance_init,
     .instance_size = sizeof(nvic_state),
     .class_init    = armv7m_nvic_class_init,
     .class_size    = sizeof(NVICClass),
-- 
1.7.5.4

             reply	other threads:[~2012-07-24 10:39 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-24 10:39 Peter Maydell [this message]
2012-07-31  0:37 ` [Qemu-devel] [PATCH] hw/armv7m_nvic: Fix incorrect default for num-irqs property Peter Crosthwaite
2012-07-31 17:23   ` Peter Maydell

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