From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49591) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SwxtA-0003tm-Nz for qemu-devel@nongnu.org; Thu, 02 Aug 2012 12:04:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Swxt4-0001vD-Nn for qemu-devel@nongnu.org; Thu, 02 Aug 2012 12:04:40 -0400 Received: from mail-yx0-f173.google.com ([209.85.213.173]:55980) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Swxt4-0001v5-IW for qemu-devel@nongnu.org; Thu, 02 Aug 2012 12:04:34 -0400 Received: by yenl1 with SMTP id l1so8641012yen.4 for ; Thu, 02 Aug 2012 09:04:34 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Thu, 2 Aug 2012 18:04:06 +0200 Message-Id: <1343923453-13026-4-git-send-email-pbonzini@redhat.com> In-Reply-To: <1343923453-13026-1-git-send-email-pbonzini@redhat.com> References: <1343923453-13026-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH v3 03/10] RTC: introduce RTC_CLOCK_RATE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: yang.z.zhang@intel.com, aliguori@linux.vnet.ibm.com, mdroth@linux.vnet.ibm.com, quintela@redhat.com Signed-off-by: Paolo Bonzini --- hw/mc146818rtc.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index b99f4d3..175ddac 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -46,6 +46,7 @@ #endif #define RTC_REINJECT_ON_ACK_COUNT 20 +#define RTC_CLOCK_RATE 32768 typedef struct RTCState { ISADevice dev; @@ -85,7 +86,7 @@ static void rtc_coalesced_timer_update(RTCState *s) /* divide each RTC interval to 2 - 8 smaller intervals */ int c = MIN(s->irq_coalesced, 7) + 1; int64_t next_clock = qemu_get_clock_ns(rtc_clock) + - muldiv64(s->period / c, get_ticks_per_sec(), 32768); + muldiv64(s->period / c, get_ticks_per_sec(), RTC_CLOCK_RATE); qemu_mod_timer(s->coalesced_timer, next_clock); } } @@ -131,10 +132,10 @@ static void periodic_timer_update(RTCState *s, int64_t current_time) s->period = period; #endif /* compute 32 khz clock */ - cur_clock = muldiv64(current_time, 32768, get_ticks_per_sec()); + cur_clock = muldiv64(current_time, RTC_CLOCK_RATE, get_ticks_per_sec()); next_irq_clock = (cur_clock & ~(period - 1)) + period; s->next_periodic_time = - muldiv64(next_irq_clock, get_ticks_per_sec(), 32768) + 1; + muldiv64(next_irq_clock, get_ticks_per_sec(), RTC_CLOCK_RATE) + 1; qemu_mod_timer(s->periodic_timer, s->next_periodic_time); } else { #ifdef TARGET_I386 @@ -369,7 +370,7 @@ static void rtc_update_second(void *opaque) /* update in progress bit */ s->cmos_data[RTC_REG_A] |= REG_A_UIP; } - /* should be 244 us = 8 / 32768 seconds, but currently the + /* should be 244 us = 8 / RTC_CLOCK_RATE seconds, but currently the timers do not have the necessary resolution. */ delay = (get_ticks_per_sec() * 1) / 100; if (delay < 1) -- 1.7.10.4