From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:37855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sx8DG-0004mh-9z for qemu-devel@nongnu.org; Thu, 02 Aug 2012 23:06:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Sx8DB-000681-KL for qemu-devel@nongnu.org; Thu, 02 Aug 2012 23:06:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50542) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sx8DA-00067F-Vg for qemu-devel@nongnu.org; Thu, 02 Aug 2012 23:06:01 -0400 From: Eduardo Habkost Date: Thu, 2 Aug 2012 23:59:20 -0300 Message-Id: <1343962766-22024-14-git-send-email-ehabkost@redhat.com> In-Reply-To: <1343962766-22024-1-git-send-email-ehabkost@redhat.com> References: <1343962766-22024-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [RFC 13/19] move X86CPUDefinition to cpu-qom.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= From: Eduardo Habkost The struct will be used by X86CPUClass, too. Signed-off-by: Eduardo Habkost --- target-i386/cpu-qom.h | 20 ++++++++++++++++++++ target-i386/cpu.c | 19 ------------------- 2 files changed, 20 insertions(+), 19 deletions(-) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 5901140..03e2c3a 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -37,6 +37,26 @@ #define X86_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(X86CPUClass, (obj), TYPE_X86_CPU) + +typedef struct X86CPUDefinition { + uint32_t level; + uint32_t vendor1, vendor2, vendor3; + int family; + int model; + int stepping; + int tsc_khz; + uint32_t features, ext_features, ext2_features, ext3_features; + uint32_t kvm_features, svm_features; + uint32_t xlevel; + char model_id[48]; + int vendor_override; + /* Store the results of Centaur's CPUID instructions */ + uint32_t ext4_features; + uint32_t xlevel2; + /* The feature bits on CPUID[EAX=7,ECX=0].EBX */ + uint32_t cpuid_7_0_ebx_features; +} X86CPUDefinition; + /** * X86CPUClass: * @parent_reset: The parent class' reset handler. diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 3f6efdb..5efbe41 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -222,25 +222,6 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features, fprintf(stderr, "CPU feature %s not found\n", flagname); } -typedef struct X86CPUDefinition { - uint32_t level; - uint32_t vendor1, vendor2, vendor3; - int family; - int model; - int stepping; - int tsc_khz; - uint32_t features, ext_features, ext2_features, ext3_features; - uint32_t kvm_features, svm_features; - uint32_t xlevel; - char model_id[48]; - int vendor_override; - /* Store the results of Centaur's CPUID instructions */ - uint32_t ext4_features; - uint32_t xlevel2; - /* The feature bits on CPUID[EAX=7,ECX=0].EBX */ - uint32_t cpuid_7_0_ebx_features; -} X86CPUDefinition; - #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \ CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC) -- 1.7.11.2