From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34672) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyrrE-0006vD-4n for qemu-devel@nongnu.org; Tue, 07 Aug 2012 18:02:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SyrrC-0003V4-OM for qemu-devel@nongnu.org; Tue, 07 Aug 2012 18:02:32 -0400 Received: from gate.crashing.org ([63.228.1.57]:56426) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SyrrC-0003Uh-FY for qemu-devel@nongnu.org; Tue, 07 Aug 2012 18:02:30 -0400 Message-ID: <1344376938.2698.27.camel@pasglop> From: Benjamin Herrenschmidt Date: Wed, 08 Aug 2012 08:02:18 +1000 In-Reply-To: <501BE7CE.4080200@suse.de> References: <1343873409-8571-1-git-send-email-david@gibson.dropbear.id.au> <1343873409-8571-3-git-send-email-david@gibson.dropbear.id.au> <501AA071.3030406@suse.de> <87vch1i1va.fsf@codemonkey.ws> <501AC915.5080004@suse.de> <87lihx84m4.fsf@codemonkey.ws> <501BE7CE.4080200@suse.de> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/2] pseries: Use new hook to correct reset sequence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?ISO-8859-1?Q?F=E4rber?= Cc: Igor Mammedov , David Gibson , agraf@suse.de, Anthony Liguori , qemu-devel@nongnu.org On Fri, 2012-08-03 at 17:01 +0200, Andreas F=C3=A4rber wrote: >=20 > I have posted a suggestion where CPU reset is triggered by "the > machine > as an abstract concept" (needs a bit of tweaking still, but the > general > idea is there). > Based on that, shouldn't it be rather easy to add a Notifier similar > to > "machine init done" that lets individual machines do post-reset setup? > I.e. not have QEMUMachine trigger and control the reset. >=20 Note that we really want pre and post reset vs the device reset. That's why the machine should be the one in charge. The top level of the reset sequencing is -not- the CPU, it's the machine. All machines (or SoCs) have some kind of reset controller and provide facilities for resetting individual devices, busses, processor cores.... the global "system" reset (when it exists) itself might have interesting ordering or sequencing requirements. Now, to fix our immediate problem on ppc for 1.2 the hook proposed by Anthony for which David sent a patch does the job just fine, it allows us to clean out all our iommu tables before the device-reset, meaning that in-flights DMA cannot overwrite the various "files" (SLOF image etc.... that are auto-loaded via reset handlers implicitely created by load_image_targphys), and we can then do some post-initializations as well to get things ready for a restart (rebuild the device-tree, etc...) Cheers, Ben.