[Qemu-devel] [0/10] pseries updates and cleanups

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* [Qemu-devel] [0/10] pseries updates and cleanups
@ 2012-08-08  2:10 David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 01/10] pseries: Update SLOF David Gibson
                   ` (10 more replies)
  0 siblings, 11 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: aliguori, qemu-devel

Hi Alex,

This series contains all my outstanding pseries updates which aren't
dependent on getting a generic patch upstream first.  I have a number
more which are actually more urgent to get into 1.2, but we need to
get some word on the generic patches before I can really push those.

In the meantime, if you could pull these various updates and cleanups
into ppc-next ready for the 1.2 freeze, that would be great.

^ permalink raw reply	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 01/10] pseries: Update SLOF
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 02/10] pseries: Remove extraneous prints David Gibson
                   ` (9 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: aliguori, qemu-devel, David Gibson

This patch updates the SLOF version, introducing a number of fixes:
 * add proper graphics support
 * fix bugs with graphical terminal under grub2
 * fix bugs in handling of 64-bit unit addresses
 * fix VSCSI representation to be closer to PowerVM
 * fix bugs which caused grub2 to crash

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 pc-bios/README   |    2 +-
 pc-bios/slof.bin |  Bin 880496 -> 878088 bytes
 roms/SLOF        |    2 +-
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/pc-bios/README b/pc-bios/README
index e56e9e5..e71bcd0 100644
--- a/pc-bios/README
+++ b/pc-bios/README
@@ -17,7 +17,7 @@
 - SLOF (Slimline Open Firmware) is a free IEEE 1275 Open Firmware
   implementation for certain IBM POWER hardware.  The sources are at
   https://github.com/dgibson/SLOF, and the image currently in qemu is
-  built from git tag qemu-slof-20120217.
+  built from git tag qemu-slof-20120719.

 - sgabios (the Serial Graphics Adapter option ROM) provides a means for
   legacy x86 software to communicate with an attached serial console as
diff --git a/pc-bios/slof.bin b/pc-bios/slof.bin
index 449a7bb2afaf604f6c089612e99086df0800d7dc..320b8f001cf9962318812a5b9109242e210fe499 100644
GIT binary patch
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diff --git a/roms/SLOF b/roms/SLOF
index d153364..7279655 160000
--- a/roms/SLOF
+++ b/roms/SLOF
@@ -1 +1 @@
-Subproject commit d153364253548d6cd91403711f84996e6a7dab31
+Subproject commit 7279655af2eba855bd2df61303d25abd1eeb2300
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 02/10] pseries: Remove extraneous prints
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 01/10] pseries: Update SLOF David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 03/10] pseries: Rework irq assignment to avoid carrying qemu_irqs around David Gibson
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: aliguori, qemu-devel, David Gibson

The pseries machine prints several messages to stderr whenever it starts up
and another whenever the vm is reset.  It's not normal for qemu machines to
do this though, so this patch removes them.  We can put them back
conditional on a DEBUG symbol if we really need them in future.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr.c |   18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index ab5a0c2..3a303cd 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -532,8 +532,6 @@ static void spapr_reset(void *opaque)
 {
     sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
 
-    fprintf(stderr, "sPAPR reset\n");
-
     /* flush out the hash table */
     memset(spapr->htab, 0, spapr->htab_size);
 
@@ -716,14 +714,6 @@ static void ppc_spapr_init(ram_addr_t ram_size,
         exit(1);
     }
 
-    fprintf(stderr, "sPAPR memory map:\n");
-    fprintf(stderr, "RTAS                 : 0x%08lx..%08lx\n",
-            (unsigned long)spapr->rtas_addr,
-            (unsigned long)(spapr->rtas_addr + spapr->rtas_size - 1));
-    fprintf(stderr, "FDT                  : 0x%08lx..%08lx\n",
-            (unsigned long)spapr->fdt_addr,
-            (unsigned long)(spapr->fdt_addr + FDT_MAX_SIZE - 1));
-
     if (kernel_filename) {
         uint64_t lowaddr = 0;
 
@@ -739,8 +729,6 @@ static void ppc_spapr_init(ram_addr_t ram_size,
                     kernel_filename);
             exit(1);
         }
-        fprintf(stderr, "Kernel               : 0x%08x..%08lx\n",
-                KERNEL_LOAD_ADDR, KERNEL_LOAD_ADDR + kernel_size - 1);
 
         /* load initrd */
         if (initrd_filename) {
@@ -755,8 +743,6 @@ static void ppc_spapr_init(ram_addr_t ram_size,
                         initrd_filename);
                 exit(1);
             }
-            fprintf(stderr, "Ramdisk              : 0x%08lx..%08lx\n",
-                    (long)initrd_base, (long)(initrd_base + initrd_size - 1));
         } else {
             initrd_base = 0;
             initrd_size = 0;
@@ -770,10 +756,6 @@ static void ppc_spapr_init(ram_addr_t ram_size,
         exit(1);
     }
     g_free(filename);
-    fprintf(stderr, "Firmware load        : 0x%08x..%08lx\n",
-            0, fw_size);
-    fprintf(stderr, "Firmware runtime     : 0x%08lx..%08lx\n",
-            load_limit, (unsigned long)spapr->fdt_addr);
 
     spapr->entry_point = 0x100;
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 03/10] pseries: Rework irq assignment to avoid carrying qemu_irqs around
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 01/10] pseries: Update SLOF David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 02/10] pseries: Remove extraneous prints David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 04/10] pseries: Separate PCI RTAS setup from common from emulation specific PCI setup David Gibson
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

Currently, the interfaces in the pseries machine code for assignment
and setup of interrupts pass around qemu_irq objects.  That was done
in an attempt not to be too closely linked to the specific XICS
interrupt controller.  However interactions with the device tree setup
made that attempt rather futile, and XICS is part of the PAPR spec
anyway, so this really just meant we had to carry both the qemu_irq
pointers and the XICS irq numbers around.

This mess will just get worse when we add upcoming PCI MSI support,
since that will require tracking a bunch more interrupt.  Therefore,
this patch reworks the spapr code to just use XICS irq numbers
(roughly equivalent to GSIs on x86) and only retrieve the qemu_irq
pointers from the XICS code when we need them (a trivial lookup).

This is a reworked and generalized version of an earlier spapr_pci
specific patch from Alexey Kardashevskiy.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr.c      |   18 +++++++-----------
 hw/spapr.h      |   11 +++++------
 hw/spapr_llan.c |    2 +-
 hw/spapr_pci.c  |   14 ++++++--------
 hw/spapr_pci.h  |    8 ++++++--
 hw/spapr_vio.c  |   12 ++++++------
 hw/spapr_vio.h  |    8 ++++++--
 hw/spapr_vty.c  |    2 +-
 hw/xics.c       |   12 +++++++++---
 hw/xics.h       |    5 +++--
 10 files changed, 50 insertions(+), 42 deletions(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index 3a303cd..cdc66d1 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -83,11 +83,9 @@
 
 sPAPREnvironment *spapr;
 
-qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
-                            enum xics_irq_type type)
+int spapr_allocate_irq(int hint, enum xics_irq_type type)
 {
-    uint32_t irq;
-    qemu_irq qirq;
+    int irq;
 
     if (hint) {
         irq = hint;
@@ -96,16 +94,14 @@ qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
         irq = spapr->next_irq++;
     }
 
-    qirq = xics_assign_irq(spapr->icp, irq, type);
-    if (!qirq) {
-        return NULL;
+    /* Configure irq type */
+    if (!xics_get_qirq(spapr->icp, irq)) {
+        return 0;
     }
 
-    if (irq_num) {
-        *irq_num = irq;
-    }
+    xics_set_irq_type(spapr->icp, irq, type);
 
-    return qirq;
+    return irq;
 }
 
 static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr)
diff --git a/hw/spapr.h b/hw/spapr.h
index 9153f29..c5de18d 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -288,17 +288,16 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
 target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
                              target_ulong *args);
 
-qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
-                            enum xics_irq_type type);
+int spapr_allocate_irq(int hint, enum xics_irq_type type);
 
-static inline qemu_irq spapr_allocate_msi(uint32_t hint, uint32_t *irq_num)
+static inline int spapr_allocate_msi(int hint)
 {
-    return spapr_allocate_irq(hint, irq_num, XICS_MSI);
+    return spapr_allocate_irq(hint, XICS_MSI);
 }
 
-static inline qemu_irq spapr_allocate_lsi(uint32_t hint, uint32_t *irq_num)
+static inline int spapr_allocate_lsi(int hint)
 {
-    return spapr_allocate_irq(hint, irq_num, XICS_LSI);
+    return spapr_allocate_irq(hint, XICS_LSI);
 }
 
 static inline uint32_t rtas_ld(target_ulong phys, int n)
diff --git a/hw/spapr_llan.c b/hw/spapr_llan.c
index 01e54f3..bd3f131 100644
--- a/hw/spapr_llan.c
+++ b/hw/spapr_llan.c
@@ -169,7 +169,7 @@ static ssize_t spapr_vlan_receive(NetClientState *nc, const uint8_t *buf,
     }
 
     if (sdev->signal_state & 1) {
-        qemu_irq_pulse(sdev->qirq);
+        qemu_irq_pulse(spapr_vio_qirq(sdev));
     }
 
     return size;
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index 2913540..65ae8c4 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -223,7 +223,7 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level)
      */
     sPAPRPHBState *phb = opaque;
 
-    qemu_set_irq(phb->lsi_table[irq_num].qirq, level);
+    qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level);
 }
 
 static uint64_t spapr_io_read(void *opaque, target_phys_addr_t addr,
@@ -329,16 +329,14 @@ static int spapr_phb_init(SysBusDevice *s)
 
     /* Initialize the LSI table */
     for (i = 0; i < PCI_NUM_PINS; i++) {
-        qemu_irq qirq;
-        uint32_t num;
+        uint32_t irq;
 
-        qirq = spapr_allocate_lsi(0, &num);
-        if (!qirq) {
+        irq = spapr_allocate_lsi(0);
+        if (!irq) {
             return -1;
         }
 
-        phb->lsi_table[i].dt_irq = num;
-        phb->lsi_table[i].qirq = qirq;
+        phb->lsi_table[i].irq = irq;
     }
 
     return 0;
@@ -477,7 +475,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
             irqmap[2] = 0;
             irqmap[3] = cpu_to_be32(j+1);
             irqmap[4] = cpu_to_be32(xics_phandle);
-            irqmap[5] = cpu_to_be32(phb->lsi_table[lsi_num].dt_irq);
+            irqmap[5] = cpu_to_be32(phb->lsi_table[lsi_num].irq);
             irqmap[6] = cpu_to_be32(0x8);
         }
     }
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h
index dd66f4b..6bba885 100644
--- a/hw/spapr_pci.h
+++ b/hw/spapr_pci.h
@@ -40,13 +40,17 @@ typedef struct sPAPRPHBState {
     DMAContext *dma;
 
     struct {
-        uint32_t dt_irq;
-        qemu_irq qirq;
+        uint32_t irq;
     } lsi_table[PCI_NUM_PINS];
 
     QLIST_ENTRY(sPAPRPHBState) list;
 } sPAPRPHBState;
 
+static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
+{
+    return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq);
+}
+
 #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
 #define SPAPR_PCI_IO_WIN_SIZE        0x10000
 
diff --git a/hw/spapr_vio.c b/hw/spapr_vio.c
index 05b5503..3abe853 100644
--- a/hw/spapr_vio.c
+++ b/hw/spapr_vio.c
@@ -49,7 +49,7 @@
 #endif
 
 static Property spapr_vio_props[] = {
-    DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, vio_irq_num, 0), \
+    DEFINE_PROP_UINT32("irq", VIOsPAPRDevice, irq, 0), \
     DEFINE_PROP_END_OF_LIST(),
 };
 
@@ -132,8 +132,8 @@ static int vio_make_devnode(VIOsPAPRDevice *dev,
         }
     }
 
-    if (dev->qirq) {
-        uint32_t ints_prop[] = {cpu_to_be32(dev->vio_irq_num), 0};
+    if (dev->irq) {
+        uint32_t ints_prop[] = {cpu_to_be32(dev->irq), 0};
 
         ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
                           sizeof(ints_prop));
@@ -306,7 +306,7 @@ int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
     dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
 
     if (dev->signal_state & 1) {
-        qemu_irq_pulse(dev->qirq);
+        qemu_irq_pulse(spapr_vio_qirq(dev));
     }
 
     return 0;
@@ -459,8 +459,8 @@ static int spapr_vio_busdev_init(DeviceState *qdev)
         dev->qdev.id = id;
     }
 
-    dev->qirq = spapr_allocate_msi(dev->vio_irq_num, &dev->vio_irq_num);
-    if (!dev->qirq) {
+    dev->irq = spapr_allocate_msi(dev->irq);
+    if (!dev->irq) {
         return -1;
     }
 
diff --git a/hw/spapr_vio.h b/hw/spapr_vio.h
index 6f9a498..ea6aa43 100644
--- a/hw/spapr_vio.h
+++ b/hw/spapr_vio.h
@@ -61,8 +61,7 @@ struct VIOsPAPRDevice {
     DeviceState qdev;
     uint32_t reg;
     uint32_t flags;
-    qemu_irq qirq;
-    uint32_t vio_irq_num;
+    uint32_t irq;
     target_ulong signal_state;
     VIOsPAPR_CRQ crq;
     DMAContext *dma;
@@ -85,6 +84,11 @@ extern int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus);
 
 extern int spapr_vio_signal(VIOsPAPRDevice *dev, target_ulong mode);
 
+static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev)
+{
+    return xics_get_qirq(spapr->icp, dev->irq);
+}
+
 static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr,
                                        uint32_t size, DMADirection dir)
 {
diff --git a/hw/spapr_vty.c b/hw/spapr_vty.c
index 99e52cc..5da17a3 100644
--- a/hw/spapr_vty.c
+++ b/hw/spapr_vty.c
@@ -26,7 +26,7 @@ static void vty_receive(void *opaque, const uint8_t *buf, int size)
 
     if ((dev->in == dev->out) && size) {
         /* toggle line to simulate edge interrupt */
-        qemu_irq_pulse(dev->sdev.qirq);
+        qemu_irq_pulse(spapr_vio_qirq(&dev->sdev));
     }
     for (i = 0; i < size; i++) {
         assert((dev->in - dev->out) < VTERM_BUFSIZE);
diff --git a/hw/xics.c b/hw/xics.c
index 668a0d6..b415aa2 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -315,18 +315,24 @@ static void ics_eoi(struct ics_state *ics, int nr)
  * Exported functions
  */
 
-qemu_irq xics_assign_irq(struct icp_state *icp, int irq,
-                         enum xics_irq_type type)
+qemu_irq xics_get_qirq(struct icp_state *icp, int irq)
 {
     if ((irq < icp->ics->offset)
         || (irq >= (icp->ics->offset + icp->ics->nr_irqs))) {
         return NULL;
     }
 
+    return icp->ics->qirqs[irq - icp->ics->offset];
+}
+
+void xics_set_irq_type(struct icp_state *icp, int irq,
+                       enum xics_irq_type type)
+{
+    assert ((irq >= icp->ics->offset)
+            && (irq < (icp->ics->offset + icp->ics->nr_irqs)));
     assert((type == XICS_MSI) || (type == XICS_LSI));
 
     icp->ics->irqs[irq - icp->ics->offset].type = type;
-    return icp->ics->qirqs[irq - icp->ics->offset];
 }
 
 static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,
diff --git a/hw/xics.h b/hw/xics.h
index 2080159..99b96ac 100644
--- a/hw/xics.h
+++ b/hw/xics.h
@@ -36,8 +36,9 @@ enum xics_irq_type {
     XICS_LSI,        /* Level-signalled interrupt */
 };
 
-qemu_irq xics_assign_irq(struct icp_state *icp, int irq,
-                         enum xics_irq_type type);
+qemu_irq xics_get_qirq(struct icp_state *icp, int irq);
+void xics_set_irq_type(struct icp_state *icp, int irq,
+                       enum xics_irq_type type);
 
 struct icp_state *xics_system_init(int nr_irqs);
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 04/10] pseries: Separate PCI RTAS setup from common from emulation specific PCI setup
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (2 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 03/10] pseries: Rework irq assignment to avoid carrying qemu_irqs around David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 05/10] pseries: added allocator for a block of IRQs David Gibson
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

Currently the RTAS functions for handling PCI are registered from the
class init code for the PCI host bridge.  That sort of makes sense
now, but will break in the future when vfio gives us multiple types of
host bridge for pseries (emulated and pass-through, at least).  The
RTAS functions will be common across all host bridge types (and will
call out to different places internally depending on the type).

So, this patch moves the RTAS registration into its own function
called direct from the machine setup code.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr.c     |    2 ++
 hw/spapr_pci.c |   13 ++++++++-----
 hw/spapr_pci.h |    2 ++
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index cdc66d1..8b4af62 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -681,6 +681,8 @@ static void ppc_spapr_init(ram_addr_t ram_size,
     }
 
     /* Set up PCI */
+    spapr_pci_rtas_init();
+
     spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
                      SPAPR_PCI_MEM_WIN_ADDR,
                      SPAPR_PCI_MEM_WIN_SIZE,
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index 65ae8c4..fcc358e 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -359,11 +359,6 @@ static void spapr_phb_class_init(ObjectClass *klass, void *data)
 
     sdc->init = spapr_phb_init;
     dc->props = spapr_phb_properties;
-
-    spapr_rtas_register("read-pci-config", rtas_read_pci_config);
-    spapr_rtas_register("write-pci-config", rtas_write_pci_config);
-    spapr_rtas_register("ibm,read-pci-config", rtas_ibm_read_pci_config);
-    spapr_rtas_register("ibm,write-pci-config", rtas_ibm_write_pci_config);
 }
 
 static TypeInfo spapr_phb_info = {
@@ -488,6 +483,14 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
     return 0;
 }
 
+void spapr_pci_rtas_init(void)
+{
+    spapr_rtas_register("read-pci-config", rtas_read_pci_config);
+    spapr_rtas_register("write-pci-config", rtas_write_pci_config);
+    spapr_rtas_register("ibm,read-pci-config", rtas_ibm_read_pci_config);
+    spapr_rtas_register("ibm,write-pci-config", rtas_ibm_write_pci_config);
+}
+
 static void register_types(void)
 {
     type_register_static(&spapr_phb_info);
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h
index 6bba885..2aee67f 100644
--- a/hw/spapr_pci.h
+++ b/hw/spapr_pci.h
@@ -63,4 +63,6 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
                           uint32_t xics_phandle,
                           void *fdt);
 
+void spapr_pci_rtas_init(void);
+
 #endif /* __HW_SPAPR_PCI_H__ */
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 05/10] pseries: added allocator for a block of IRQs
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (3 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 04/10] pseries: Separate PCI RTAS setup from common from emulation specific PCI setup David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code David Gibson
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

From: Alexey Kardashevskiy <aik@ozlabs.ru>

The patch adds a simple helper which allocates a consecutive sequence
of IRQs calling spapr_allocate_irq for each and checks that allocated
IRQs go consequently.

The patch is required for upcoming support of MSI/MSIX on POWER.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr.c |   26 ++++++++++++++++++++++++++
 hw/spapr.h |    1 +
 2 files changed, 27 insertions(+)

diff --git a/hw/spapr.c b/hw/spapr.c
index 8b4af62..2b66f54 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -104,6 +104,32 @@ int spapr_allocate_irq(int hint, enum xics_irq_type type)
     return irq;
 }
 
+/* Allocate block of consequtive IRQs, returns a number of the first */
+int spapr_allocate_irq_block(int num, enum xics_irq_type type)
+{
+    int first = -1;
+    int i;
+
+    for (i = 0; i < num; ++i) {
+        int irq;
+
+        irq = spapr_allocate_irq(0, type);
+        if (!irq) {
+            return -1;
+        }
+
+        if (0 == i) {
+            first = irq;
+        }
+
+        /* If the above doesn't create a consecutive block then that's
+         * an internal bug */
+        assert(irq == (first + i));
+    }
+
+    return first;
+}
+
 static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr)
 {
     int ret = 0, offset;
diff --git a/hw/spapr.h b/hw/spapr.h
index c5de18d..76493cb 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -289,6 +289,7 @@ target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
                              target_ulong *args);
 
 int spapr_allocate_irq(int hint, enum xics_irq_type type);
+int spapr_allocate_irq_block(int num, enum xics_irq_type type);
 
 static inline int spapr_allocate_msi(int hint)
 {
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (4 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 05/10] pseries: added allocator for a block of IRQs David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-14 11:45   ` Alexander Graf
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 07/10] pseries: Add trace event for PCI irqs David Gibson
                   ` (4 subsequent siblings)
  10 siblings, 1 reply; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

From: Alexey Kardashevskiy <aik@ozlabs.ru>

The pseries PCI code makes use of an internal find_dev() function which
locates a PCIDevice * given a (platform specific) bus ID and device
address.  Internally this needs to first locate the host bridge on which
the device resides based on the bus ID.  This patch exposes that host
bridge lookup as a separate function, which we will need later in the MSI
and VFIO code.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr_pci.c |   32 ++++++++++++++++++++++----------
 1 file changed, 22 insertions(+), 10 deletions(-)

diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index fcc358e..842068f 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -29,27 +29,39 @@
 #include "hw/spapr_pci.h"
 #include "exec-memory.h"
 #include <libfdt.h>
+#include "trace.h"
 
 #include "hw/pci_internals.h"
 
-static PCIDevice *find_dev(sPAPREnvironment *spapr,
-                           uint64_t buid, uint32_t config_addr)
+static sPAPRPHBState *find_phb(sPAPREnvironment *spapr, uint64_t buid)
 {
-    int devfn = (config_addr >> 8) & 0xFF;
     sPAPRPHBState *phb;
 
     QLIST_FOREACH(phb, &spapr->phbs, list) {
-        BusChild *kid;
-
         if (phb->buid != buid) {
             continue;
         }
+        return phb;
+    }
+
+    return NULL;
+}
+
+static PCIDevice *find_dev(sPAPREnvironment *spapr, uint64_t buid,
+                           uint32_t config_addr)
+{
+    sPAPRPHBState *phb = find_phb(spapr, buid);
+    BusChild *kid;
+    int devfn = (config_addr >> 8) & 0xFF;
+
+    if (!phb) {
+        return NULL;
+    }
 
-        QTAILQ_FOREACH(kid, &phb->host_state.bus->qbus.children, sibling) {
-            PCIDevice *dev = (PCIDevice *)kid->child;
-            if (dev->devfn == devfn) {
-                return dev;
-            }
+    QTAILQ_FOREACH(kid, &phb->host_state.bus->qbus.children, sibling) {
+        PCIDevice *dev = (PCIDevice *)kid->child;
+        if (dev->devfn == devfn) {
+            return dev;
         }
     }
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* Re: [Qemu-devel] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code David Gibson
@ 2012-08-14 11:45   ` Alexander Graf
  2012-08-15  1:03     ` [Qemu-devel] [Qemu-ppc] " David Gibson
  0 siblings, 1 reply; 17+ messages in thread
From: Alexander Graf @ 2012-08-14 11:45 UTC (permalink / raw)
  To: David Gibson; +Cc: Alexey Kardashevskiy, aliguori, qemu-ppc, qemu-devel

On 08/08/2012 04:10 AM, David Gibson wrote:
> From: Alexey Kardashevskiy <aik@ozlabs.ru>
>
> The pseries PCI code makes use of an internal find_dev() function which
> locates a PCIDevice * given a (platform specific) bus ID and device
> address.  Internally this needs to first locate the host bridge on which
> the device resides based on the bus ID.  This patch exposes that host
> bridge lookup as a separate function, which we will need later in the MSI
> and VFIO code.
>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
>   hw/spapr_pci.c |   32 ++++++++++++++++++++++----------
>   1 file changed, 22 insertions(+), 10 deletions(-)
>
> diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
> index fcc358e..842068f 100644
> --- a/hw/spapr_pci.c
> +++ b/hw/spapr_pci.c
> @@ -29,27 +29,39 @@
>   #include "hw/spapr_pci.h"
>   #include "exec-memory.h"
>   #include <libfdt.h>
> +#include "trace.h"

trace.h?


Alex

>   
>   #include "hw/pci_internals.h"
>   
> -static PCIDevice *find_dev(sPAPREnvironment *spapr,
> -                           uint64_t buid, uint32_t config_addr)
> +static sPAPRPHBState *find_phb(sPAPREnvironment *spapr, uint64_t buid)
>   {
> -    int devfn = (config_addr >> 8) & 0xFF;
>       sPAPRPHBState *phb;
>   
>       QLIST_FOREACH(phb, &spapr->phbs, list) {
> -        BusChild *kid;
> -
>           if (phb->buid != buid) {
>               continue;
>           }
> +        return phb;
> +    }
> +
> +    return NULL;
> +}
> +
> +static PCIDevice *find_dev(sPAPREnvironment *spapr, uint64_t buid,
> +                           uint32_t config_addr)
> +{
> +    sPAPRPHBState *phb = find_phb(spapr, buid);
> +    BusChild *kid;
> +    int devfn = (config_addr >> 8) & 0xFF;
> +
> +    if (!phb) {
> +        return NULL;
> +    }
>   
> -        QTAILQ_FOREACH(kid, &phb->host_state.bus->qbus.children, sibling) {
> -            PCIDevice *dev = (PCIDevice *)kid->child;
> -            if (dev->devfn == devfn) {
> -                return dev;
> -            }
> +    QTAILQ_FOREACH(kid, &phb->host_state.bus->qbus.children, sibling) {
> +        PCIDevice *dev = (PCIDevice *)kid->child;
> +        if (dev->devfn == devfn) {
> +            return dev;
>           }
>       }
>   

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [Qemu-devel] [Qemu-ppc] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code
  2012-08-14 11:45   ` Alexander Graf
@ 2012-08-15  1:03     ` David Gibson
  0 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-15  1:03 UTC (permalink / raw)
  To: Alexander Graf; +Cc: aliguori, qemu-ppc, qemu-devel

On Tue, Aug 14, 2012 at 01:45:53PM +0200, Alexander Graf wrote:
> On 08/08/2012 04:10 AM, David Gibson wrote:
> >From: Alexey Kardashevskiy <aik@ozlabs.ru>
> >
> >The pseries PCI code makes use of an internal find_dev() function which
> >locates a PCIDevice * given a (platform specific) bus ID and device
> >address.  Internally this needs to first locate the host bridge on which
> >the device resides based on the bus ID.  This patch exposes that host
> >bridge lookup as a separate function, which we will need later in the MSI
> >and VFIO code.
> >
> >Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> >Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> >---
> >  hw/spapr_pci.c |   32 ++++++++++++++++++++++----------
> >  1 file changed, 22 insertions(+), 10 deletions(-)
> >
> >diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
> >index fcc358e..842068f 100644
> >--- a/hw/spapr_pci.c
> >+++ b/hw/spapr_pci.c
> >@@ -29,27 +29,39 @@
> >  #include "hw/spapr_pci.h"
> >  #include "exec-memory.h"
> >  #include <libfdt.h>
> >+#include "trace.h"
> 
> trace.h?

Sorry, probably leaked in from an earlier version or related patch
which did actually add some trace point calls.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 07/10] pseries: Add trace event for PCI irqs
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (5 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 08/10] pseries: Add PCI MSI/MSI-X support David Gibson
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

From: Alexey Kardashevskiy <aik@ozlabs.ru>

This adds a trace event in the pseries PCI specific set_irq() function to
assist in debugging.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr_pci.c |    1 +
 trace-events   |    3 +++
 2 files changed, 4 insertions(+)

diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index 842068f..1eb1a7e 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -235,6 +235,7 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level)
      */
     sPAPRPHBState *phb = opaque;
 
+    trace_spapr_pci_lsi_set(phb->busname, irq_num, phb->lsi_table[irq_num].irq);
     qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level);
 }
 
diff --git a/trace-events b/trace-events
index 6b12f83..191b39e 100644
--- a/trace-events
+++ b/trace-events
@@ -970,3 +970,6 @@ qxl_render_blit_guest_primary_initialized(void) ""
 qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
 qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
 qxl_render_update_area_done(void *cookie) "%p"
+
+# hw/spapr_pci.c
+spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 08/10] pseries: Add PCI MSI/MSI-X support
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (6 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 07/10] pseries: Add trace event for PCI irqs David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 09/10] pseries dma: DMA window params added to PHB and DT population changed David Gibson
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

This patch implements MSI and MSI-X support for the pseries PCI host
bridge.  To do this it adds:

 * A "config_space_address to msi_table" map, since the MSI RTAS calls
take a PCI config space address as an identifier.

 * A MSIX memory region to catch msi_notify()/msix_notiry() from
virtio-pci and pass them to the guest via qemu_irq_pulse().

 * RTAS call "ibm,change-msi" which sets up MSI vectors for a
device. Note that this call may configure and return lesser number of
vectors than requested.

 * RTAS call "ibm,query-interrupt-source-number" which translates MSI
vector to interrupt controller (XICS) IRQ number.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr.c     |    7 +-
 hw/spapr_pci.c |  245 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 hw/spapr_pci.h |   15 +++-
 trace-events   |    5 ++
 4 files changed, 268 insertions(+), 4 deletions(-)

diff --git a/hw/spapr.c b/hw/spapr.c
index 2b66f54..9efed0e 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -41,6 +41,7 @@
 #include "hw/spapr_vio.h"
 #include "hw/spapr_pci.h"
 #include "hw/xics.h"
+#include "hw/msi.h"
 
 #include "kvm.h"
 #include "kvm_ppc.h"
@@ -78,6 +79,7 @@
 #define SPAPR_PCI_MEM_WIN_ADDR  (0x10000000000ULL + 0xA0000000)
 #define SPAPR_PCI_MEM_WIN_SIZE  0x20000000
 #define SPAPR_PCI_IO_WIN_ADDR   (0x10000000000ULL + 0x80000000)
+#define SPAPR_PCI_MSI_WIN_ADDR  (0x10000000000ULL + 0x90000000)
 
 #define PHANDLE_XICP            0x00001111
 
@@ -596,6 +598,8 @@ static void ppc_spapr_init(ram_addr_t ram_size,
     long pteg_shift = 17;
     char *filename;
 
+    msi_supported = true;
+
     spapr = g_malloc0(sizeof(*spapr));
     QLIST_INIT(&spapr->phbs);
 
@@ -712,7 +716,8 @@ static void ppc_spapr_init(ram_addr_t ram_size,
     spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
                      SPAPR_PCI_MEM_WIN_ADDR,
                      SPAPR_PCI_MEM_WIN_SIZE,
-                     SPAPR_PCI_IO_WIN_ADDR);
+                     SPAPR_PCI_IO_WIN_ADDR,
+                     SPAPR_PCI_MSI_WIN_ADDR);
 
     for (i = 0; i < nb_nics; i++) {
         NICInfo *nd = &nd_table[i];
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index 1eb1a7e..1108eea 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -24,6 +24,8 @@
  */
 #include "hw.h"
 #include "pci.h"
+#include "msi.h"
+#include "msix.h"
 #include "pci_host.h"
 #include "hw/spapr.h"
 #include "hw/spapr_pci.h"
@@ -33,6 +35,17 @@
 
 #include "hw/pci_internals.h"
 
+/* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */
+#define RTAS_QUERY_FN           0
+#define RTAS_CHANGE_FN          1
+#define RTAS_RESET_FN           2
+#define RTAS_CHANGE_MSI_FN      3
+#define RTAS_CHANGE_MSIX_FN     4
+
+/* Interrupt types to return on RTAS_CHANGE_* */
+#define RTAS_TYPE_MSI           1
+#define RTAS_TYPE_MSIX          2
+
 static sPAPRPHBState *find_phb(sPAPREnvironment *spapr, uint64_t buid)
 {
     sPAPRPHBState *phb;
@@ -211,6 +224,191 @@ static void rtas_write_pci_config(sPAPREnvironment *spapr,
     finish_write_pci_config(spapr, 0, addr, size, val, rets);
 }
 
+/*
+ * Find an entry with config_addr or returns the empty one if not found AND
+ * alloc_new is set.
+ * At the moment the msi_table entries are never released so there is
+ * no point to look till the end of the list if we need to find the free entry.
+ */
+static int spapr_msicfg_find(sPAPRPHBState *phb, uint32_t config_addr,
+                             bool alloc_new)
+{
+    int i;
+
+    for (i = 0; i < SPAPR_MSIX_MAX_DEVS; ++i) {
+        if (!phb->msi_table[i].nvec) {
+            break;
+        }
+        if (phb->msi_table[i].config_addr == config_addr) {
+            return i;
+        }
+    }
+    if ((i < SPAPR_MSIX_MAX_DEVS) && alloc_new) {
+        trace_spapr_pci_msi("Allocating new MSI config", i, config_addr);
+        return i;
+    }
+
+    return -1;
+}
+
+/*
+ * Set MSI/MSIX message data.
+ * This is required for msi_notify()/msix_notify() which
+ * will write at the addresses via spapr_msi_write().
+ */
+static void spapr_msi_setmsg(PCIDevice *pdev, target_phys_addr_t addr,
+                             bool msix, unsigned req_num)
+{
+    unsigned i;
+    MSIMessage msg = { .address = addr, .data = 0 };
+
+    if (!msix) {
+        msi_set_message(pdev, msg);
+        trace_spapr_pci_msi_setup(pdev->name, 0, msg.address);
+        return;
+    }
+
+    for (i = 0; i < req_num; ++i) {
+        msg.address = addr | (i << 2);
+        msix_set_message(pdev, i, msg);
+        trace_spapr_pci_msi_setup(pdev->name, i, msg.address);
+    }
+}
+
+static void rtas_ibm_change_msi(sPAPREnvironment *spapr,
+                                uint32_t token, uint32_t nargs,
+                                target_ulong args, uint32_t nret,
+                                target_ulong rets)
+{
+    uint32_t config_addr = rtas_ld(args, 0);
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    unsigned int func = rtas_ld(args, 3);
+    unsigned int req_num = rtas_ld(args, 4); /* 0 == remove all */
+    unsigned int seq_num = rtas_ld(args, 5);
+    unsigned int ret_intr_type;
+    int ndev, irq;
+    sPAPRPHBState *phb = NULL;
+    PCIDevice *pdev = NULL;
+
+    switch (func) {
+    case RTAS_CHANGE_MSI_FN:
+    case RTAS_CHANGE_FN:
+        ret_intr_type = RTAS_TYPE_MSI;
+        break;
+    case RTAS_CHANGE_MSIX_FN:
+        ret_intr_type = RTAS_TYPE_MSIX;
+        break;
+    default:
+        fprintf(stderr, "rtas_ibm_change_msi(%u) is not implemented\n", func);
+        rtas_st(rets, 0, -3); /* Parameter error */
+        return;
+    }
+
+    /* Fins sPAPRPHBState */
+    phb = find_phb(spapr, buid);
+    if (phb) {
+        pdev = find_dev(spapr, buid, config_addr);
+    }
+    if (!phb || !pdev) {
+        rtas_st(rets, 0, -3); /* Parameter error */
+        return;
+    }
+
+    /* Releasing MSIs */
+    if (!req_num) {
+        ndev = spapr_msicfg_find(phb, config_addr, false);
+        if (ndev < 0) {
+            trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr);
+            rtas_st(rets, 0, -1); /* Hardware error */
+            return;
+        }
+        trace_spapr_pci_msi("Released MSIs", ndev, config_addr);
+        rtas_st(rets, 0, 0);
+        rtas_st(rets, 1, 0);
+        return;
+    }
+
+    /* Enabling MSI */
+
+    /* Find a device number in the map to add or reuse the existing one */
+    ndev = spapr_msicfg_find(phb, config_addr, true);
+    if (ndev >= SPAPR_MSIX_MAX_DEVS) {
+        fprintf(stderr, "No free entry for a new MSI device\n");
+        rtas_st(rets, 0, -1); /* Hardware error */
+        return;
+    }
+    trace_spapr_pci_msi("Configuring MSI", ndev, config_addr);
+
+    /* Check if there is an old config and MSI number has not changed */
+    if (phb->msi_table[ndev].nvec && (req_num != phb->msi_table[ndev].nvec)) {
+        /* Unexpected behaviour */
+        fprintf(stderr, "Cannot reuse MSI config for device#%d", ndev);
+        rtas_st(rets, 0, -1); /* Hardware error */
+        return;
+    }
+
+    /* There is no cached config, allocate MSIs */
+    if (!phb->msi_table[ndev].nvec) {
+        irq = spapr_allocate_irq_block(req_num, XICS_MSI);
+        if (irq < 0) {
+            fprintf(stderr, "Cannot allocate MSIs for device#%d", ndev);
+            rtas_st(rets, 0, -1); /* Hardware error */
+            return;
+        }
+        phb->msi_table[ndev].irq = irq;
+        phb->msi_table[ndev].nvec = req_num;
+        phb->msi_table[ndev].config_addr = config_addr;
+    }
+
+    /* Setup MSI/MSIX vectors in the device (via cfgspace or MSIX BAR) */
+    spapr_msi_setmsg(pdev, phb->msi_win_addr | (ndev << 16),
+                     ret_intr_type == RTAS_TYPE_MSIX, req_num);
+
+    rtas_st(rets, 0, 0);
+    rtas_st(rets, 1, req_num);
+    rtas_st(rets, 2, ++seq_num);
+    rtas_st(rets, 3, ret_intr_type);
+
+    trace_spapr_pci_rtas_ibm_change_msi(func, req_num);
+}
+
+static void rtas_ibm_query_interrupt_source_number(sPAPREnvironment *spapr,
+                                                   uint32_t token,
+                                                   uint32_t nargs,
+                                                   target_ulong args,
+                                                   uint32_t nret,
+                                                   target_ulong rets)
+{
+    uint32_t config_addr = rtas_ld(args, 0);
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    unsigned int intr_src_num = -1, ioa_intr_num = rtas_ld(args, 3);
+    int ndev;
+    sPAPRPHBState *phb = NULL;
+
+    /* Fins sPAPRPHBState */
+    phb = find_phb(spapr, buid);
+    if (!phb) {
+        rtas_st(rets, 0, -3); /* Parameter error */
+        return;
+    }
+
+    /* Find device descriptor and start IRQ */
+    ndev = spapr_msicfg_find(phb, config_addr, false);
+    if (ndev < 0) {
+        trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr);
+        rtas_st(rets, 0, -1); /* Hardware error */
+        return;
+    }
+
+    intr_src_num = phb->msi_table[ndev].irq + ioa_intr_num;
+    trace_spapr_pci_rtas_ibm_query_interrupt_source_number(ioa_intr_num,
+                                                           intr_src_num);
+
+    rtas_st(rets, 0, 0);
+    rtas_st(rets, 1, intr_src_num);
+    rtas_st(rets, 2, 1);/* 0 == level; 1 == edge */
+}
+
 static int pci_spapr_swizzle(int slot, int pin)
 {
     return (slot + pin) % PCI_NUM_PINS;
@@ -277,6 +475,33 @@ static const MemoryRegionOps spapr_io_ops = {
 };
 
 /*
+ * MSI/MSIX memory region implementation.
+ * The handler handles both MSI and MSIX.
+ * For MSI-X, the vector number is encoded as a part of the address,
+ * data is set to 0.
+ * For MSI, the vector number is encoded in least bits in data.
+ */
+static void spapr_msi_write(void *opaque, target_phys_addr_t addr,
+                            uint64_t data, unsigned size)
+{
+    sPAPRPHBState *phb = opaque;
+    int ndev = addr >> 16;
+    int vec = ((addr & 0xFFFF) >> 2) | data;
+    uint32_t irq = phb->msi_table[ndev].irq + vec;
+
+    trace_spapr_pci_msi_write(addr, data, irq);
+
+    qemu_irq_pulse(xics_get_qirq(spapr->icp, irq));
+}
+
+static const MemoryRegionOps spapr_msi_ops = {
+    /* There is no .read as the read result is undefined by PCI spec */
+    .read = NULL,
+    .write = spapr_msi_write,
+    .endianness = DEVICE_LITTLE_ENDIAN
+};
+
+/*
  * PHB PCI device
  */
 static DMAContext *spapr_pci_dma_context_fn(PCIBus *bus, void *opaque,
@@ -327,6 +552,17 @@ static int spapr_phb_init(SysBusDevice *s)
     memory_region_add_subregion(get_system_memory(), phb->io_win_addr,
                                 &phb->iowindow);
 
+    /* As MSI/MSIX interrupts trigger by writing at MSI/MSIX vectors,
+     * we need to allocate some memory to catch those writes coming
+     * from msi_notify()/msix_notify() */
+    if (msi_supported) {
+        sprintf(namebuf, "%s.msi", phb->dtbusname);
+        memory_region_init_io(&phb->msiwindow, &spapr_msi_ops, phb,
+                              namebuf, SPAPR_MSIX_MAX_DEVS * 0x10000);
+        memory_region_add_subregion(get_system_memory(), phb->msi_win_addr,
+                                    &phb->msiwindow);
+    }
+
     bus = pci_register_bus(&phb->host_state.busdev.qdev,
                            phb->busname ? phb->busname : phb->dtbusname,
                            pci_spapr_set_irq, pci_spapr_map_irq, phb,
@@ -362,6 +598,7 @@ static Property spapr_phb_properties[] = {
     DEFINE_PROP_HEX64("mem_win_size", sPAPRPHBState, mem_win_size, 0x20000000),
     DEFINE_PROP_HEX64("io_win_addr", sPAPRPHBState, io_win_addr, 0),
     DEFINE_PROP_HEX64("io_win_size", sPAPRPHBState, io_win_size, 0x10000),
+    DEFINE_PROP_HEX64("msi_win_addr", sPAPRPHBState, msi_win_addr, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
 
@@ -384,7 +621,7 @@ static TypeInfo spapr_phb_info = {
 void spapr_create_phb(sPAPREnvironment *spapr,
                       const char *busname, uint64_t buid,
                       uint64_t mem_win_addr, uint64_t mem_win_size,
-                      uint64_t io_win_addr)
+                      uint64_t io_win_addr, uint64_t msi_win_addr)
 {
     DeviceState *dev;
 
@@ -397,6 +634,7 @@ void spapr_create_phb(sPAPREnvironment *spapr,
     qdev_prop_set_uint64(dev, "mem_win_addr", mem_win_addr);
     qdev_prop_set_uint64(dev, "mem_win_size", mem_win_size);
     qdev_prop_set_uint64(dev, "io_win_addr", io_win_addr);
+    qdev_prop_set_uint64(dev, "msi_win_addr", msi_win_addr);
 
     qdev_init_nofail(dev);
 }
@@ -502,6 +740,11 @@ void spapr_pci_rtas_init(void)
     spapr_rtas_register("write-pci-config", rtas_write_pci_config);
     spapr_rtas_register("ibm,read-pci-config", rtas_ibm_read_pci_config);
     spapr_rtas_register("ibm,write-pci-config", rtas_ibm_write_pci_config);
+    if (msi_supported) {
+        spapr_rtas_register("ibm,query-interrupt-source-number",
+                            rtas_ibm_query_interrupt_source_number);
+        spapr_rtas_register("ibm,change-msi", rtas_ibm_change_msi);
+    }
 }
 
 static void register_types(void)
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h
index 2aee67f..6892e4f 100644
--- a/hw/spapr_pci.h
+++ b/hw/spapr_pci.h
@@ -27,6 +27,8 @@
 #include "hw/pci_host.h"
 #include "hw/xics.h"
 
+#define SPAPR_MSIX_MAX_DEVS 32
+
 typedef struct sPAPRPHBState {
     PCIHostState host_state;
 
@@ -36,13 +38,22 @@ typedef struct sPAPRPHBState {
 
     MemoryRegion memspace, iospace;
     target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size;
-    MemoryRegion memwindow, iowindow;
+    target_phys_addr_t msi_win_addr;
+    MemoryRegion memwindow, iowindow, msiwindow;
+
+
     DMAContext *dma;
 
     struct {
         uint32_t irq;
     } lsi_table[PCI_NUM_PINS];
 
+    struct {
+        uint32_t config_addr;
+        uint32_t irq;
+        int nvec;
+    } msi_table[SPAPR_MSIX_MAX_DEVS];
+
     QLIST_ENTRY(sPAPRPHBState) list;
 } sPAPRPHBState;
 
@@ -57,7 +68,7 @@ static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
 void spapr_create_phb(sPAPREnvironment *spapr,
                       const char *busname, uint64_t buid,
                       uint64_t mem_win_addr, uint64_t mem_win_size,
-                      uint64_t io_win_addr);
+                      uint64_t io_win_addr, uint64_t msi_win_addr);
 
 int spapr_populate_pci_dt(sPAPRPHBState *phb,
                           uint32_t xics_phandle,
diff --git a/trace-events b/trace-events
index 191b39e..04b0723 100644
--- a/trace-events
+++ b/trace-events
@@ -972,4 +972,9 @@ qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride,
 qxl_render_update_area_done(void *cookie) "%p"
 
 # hw/spapr_pci.c
+spapr_pci_msi(const char *msg, uint32_t n, uint32_t ca) "%s (device#%d, cfg=%x)"
+spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
+spapr_pci_rtas_ibm_change_msi(unsigned func, unsigned req) "func %u, requested %u"
+spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
+spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
 spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 09/10] pseries dma: DMA window params added to PHB and DT population changed
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (7 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 08/10] pseries: Add PCI MSI/MSI-X support David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 10/10] pseries: Update SLOF firmware image David Gibson
  2012-08-14 12:34 ` [Qemu-devel] [0/10] pseries updates and cleanups Alexander Graf
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: Alexey Kardashevskiy, aliguori, qemu-devel, David Gibson

From: Alexey Kardashevskiy <aik@ozlabs.ru>

Previously the only PCI bus supported was the emulated PCI bus with
fixed DMA window with start at 0 and size 1GB. As we are going to support
PCI pass through which DMA window properties are set by the host
kernel, we have to support DMA windows with parameters other than default.

This patch adds:

1. DMA window properties to sPAPRPHBState: LIOBN (bus id), start,
size of the window.

2. An additional function spapr_dma_dt() to populate DMA window
properties in the device tree which simply accepts all the parameters
and does not try to guess what kind of IOMMU is given to it.
The original spapr_dma_dt() is renamed to spapr_tcet_dma_dt().

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/spapr.h       |    4 +++-
 hw/spapr_iommu.c |   58 ++++++++++++++++++++++++++++++++++--------------------
 hw/spapr_pci.c   |   11 +++++++----
 hw/spapr_pci.h   |    4 +++-
 hw/spapr_vio.c   |    2 +-
 5 files changed, 51 insertions(+), 28 deletions(-)

diff --git a/hw/spapr.h b/hw/spapr.h
index 76493cb..5d76c5e 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -336,6 +336,8 @@ void spapr_iommu_init(void);
 DMAContext *spapr_tce_new_dma_context(uint32_t liobn, size_t window_size);
 void spapr_tce_free(DMAContext *dma);
 int spapr_dma_dt(void *fdt, int node_off, const char *propname,
-                 DMAContext *dma);
+                 uint32_t liobn, uint64_t window, uint32_t size);
+int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
+                      DMAContext *dma);
 
 #endif /* !defined (__HW_SPAPR_H__) */
diff --git a/hw/spapr_iommu.c b/hw/spapr_iommu.c
index 388ffa4..53b7317 100644
--- a/hw/spapr_iommu.c
+++ b/hw/spapr_iommu.c
@@ -216,31 +216,47 @@ void spapr_iommu_init(void)
 }
 
 int spapr_dma_dt(void *fdt, int node_off, const char *propname,
-                 DMAContext *dma)
+                 uint32_t liobn, uint64_t window, uint32_t size)
 {
-    if (dma) {
-        sPAPRTCETable *tcet = DO_UPCAST(sPAPRTCETable, dma, dma);
-        uint32_t dma_prop[] = {cpu_to_be32(tcet->liobn),
-                               0, 0,
-                               0, cpu_to_be32(tcet->window_size)};
-        int ret;
-
-        ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
-        if (ret < 0) {
-            return ret;
-        }
+    uint32_t dma_prop[5];
+    int ret;
+
+    dma_prop[0] = cpu_to_be32(liobn);
+    dma_prop[1] = cpu_to_be32(window >> 32);
+    dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF);
+    dma_prop[3] = 0; /* window size is 32 bits */
+    dma_prop[4] = cpu_to_be32(size);
+
+    ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
+    if (ret < 0) {
+        return ret;
+    }
 
-        ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
-        if (ret < 0) {
-            return ret;
-        }
+    ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
+    if (ret < 0) {
+        return ret;
+    }
 
-        ret = fdt_setprop(fdt, node_off, propname, dma_prop,
-                          sizeof(dma_prop));
-        if (ret < 0) {
-            return ret;
-        }
+    ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop));
+    if (ret < 0) {
+        return ret;
     }
 
     return 0;
 }
+
+int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
+                      DMAContext *iommu)
+{
+    if (!iommu) {
+        return 0;
+    }
+
+    if (iommu->translate == spapr_tce_translate) {
+        sPAPRTCETable *tcet = DO_UPCAST(sPAPRTCETable, dma, iommu);
+        return spapr_dma_dt(fdt, node_off, propname,
+                tcet->liobn, 0, tcet->window_size);
+    }
+
+    return -1;
+}
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index 1108eea..0e0ab64 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -518,7 +518,6 @@ static int spapr_phb_init(SysBusDevice *s)
     char *namebuf;
     int i;
     PCIBus *bus;
-    uint32_t liobn;
 
     phb->dtbusname = g_strdup_printf("pci@%" PRIx64, phb->buid);
     namebuf = alloca(strlen(phb->dtbusname) + 32);
@@ -570,8 +569,10 @@ static int spapr_phb_init(SysBusDevice *s)
                            PCI_DEVFN(0, 0), PCI_NUM_PINS);
     phb->host_state.bus = bus;
 
-    liobn = SPAPR_PCI_BASE_LIOBN | (pci_find_domain(bus) << 16);
-    phb->dma = spapr_tce_new_dma_context(liobn, 0x40000000);
+    phb->dma_liobn = SPAPR_PCI_BASE_LIOBN | (pci_find_domain(bus) << 16);
+    phb->dma_window_start = 0;
+    phb->dma_window_size = 0x40000000;
+    phb->dma = spapr_tce_new_dma_context(phb->dma_liobn, phb->dma_window_size);
     pci_setup_iommu(bus, spapr_pci_dma_context_fn, phb);
 
     QLIST_INSERT_HEAD(&spapr->phbs, phb, list);
@@ -729,7 +730,9 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
     _FDT(fdt_setprop(fdt, bus_off, "interrupt-map", &interrupt_map,
                      sizeof(interrupt_map)));
 
-    spapr_dma_dt(fdt, bus_off, "ibm,dma-window", phb->dma);
+    spapr_dma_dt(fdt, bus_off, "ibm,dma-window",
+                 phb->dma_liobn, phb->dma_window_start,
+                 phb->dma_window_size);
 
     return 0;
 }
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h
index 6892e4f..7518899 100644
--- a/hw/spapr_pci.h
+++ b/hw/spapr_pci.h
@@ -41,7 +41,9 @@ typedef struct sPAPRPHBState {
     target_phys_addr_t msi_win_addr;
     MemoryRegion memwindow, iowindow, msiwindow;
 
-
+    uint32_t dma_liobn;
+    uint64_t dma_window_start;
+    uint64_t dma_window_size;
     DMAContext *dma;
 
     struct {
diff --git a/hw/spapr_vio.c b/hw/spapr_vio.c
index 3abe853..7ca4452 100644
--- a/hw/spapr_vio.c
+++ b/hw/spapr_vio.c
@@ -142,7 +142,7 @@ static int vio_make_devnode(VIOsPAPRDevice *dev,
         }
     }
 
-    ret = spapr_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->dma);
+    ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->dma);
     if (ret < 0) {
         return ret;
     }
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [Qemu-devel] [PATCH 10/10] pseries: Update SLOF firmware image
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (8 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 09/10] pseries dma: DMA window params added to PHB and DT population changed David Gibson
@ 2012-08-08  2:10 ` David Gibson
  2012-08-14 12:34 ` [Qemu-devel] [0/10] pseries updates and cleanups Alexander Graf
  10 siblings, 0 replies; 17+ messages in thread
From: David Gibson @ 2012-08-08  2:10 UTC (permalink / raw)
  To: agraf, qemu-ppc; +Cc: aliguori, qemu-devel, David Gibson

This updates SLOF to handle the necessary device tree properties for MSI
and MSI-X.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 pc-bios/README   |    2 +-
 pc-bios/slof.bin |  Bin 878088 -> 878640 bytes
 roms/SLOF        |    2 +-
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/pc-bios/README b/pc-bios/README
index e71bcd0..f4b37d6 100644
--- a/pc-bios/README
+++ b/pc-bios/README
@@ -17,7 +17,7 @@
 - SLOF (Slimline Open Firmware) is a free IEEE 1275 Open Firmware
   implementation for certain IBM POWER hardware.  The sources are at
   https://github.com/dgibson/SLOF, and the image currently in qemu is
-  built from git tag qemu-slof-20120719.
+  built from git tag qemu-slof-20120731.
 
 - sgabios (the Serial Graphics Adapter option ROM) provides a means for
   legacy x86 software to communicate with an attached serial console as
diff --git a/pc-bios/slof.bin b/pc-bios/slof.bin
index 320b8f001cf9962318812a5b9109242e210fe499..84ba6b83f3c7fe523cb0b0e73ae8522872d1feef 100644
GIT binary patch
delta 970
zcmb7?&rj1}7{}MHWur`EB4Q#5J^>FyEv#cd%oLfCAtXX(Fu02e-P%GE=tfsyBt|@F
zSYk|ANO(yQ4szk32}Vh8WXBzdfeU&tWdDHH$iSQUc5D-a9(<CgZ{N4y=i5A=_epPh
z*S5T~K62QVx#qQUb)A_+ts}p=Cm)t#Zmg#7?e43NGm@K={Cu0_@kPB}zZiWt8+=cC
z+Bk5#I5%*<fX5T?dQLIW^#BG$H7UmxXon$LV^373ZVzOc#Vv~&Rf`Mgla=TrzlD*L
zB7Ef6oIXeqyUUD`Hou>)HPU+b3bFB=G=@<4Cs8-k&`RR8>J6<_>do|MQf3osJONJN
z1wjRtg=WSJiI~jB_yjA-iU5^x0zNCsnwbt^JOMpjjQa|x8lPliaYd4c*vTMPJHfQY
zCz=``!G0X5$zfU2zz=-c??^LU5(U}<92T0MKDc4}a*&+l6EJdAXnIbFF)gkpo3Kt)
zVsSxaWkrKVkfWnlRdK8d|FaRyUPM)!VnTQOLrhB}^e7Yjh%7*Fe^1!~l=0E1sN&L=
zX^5%J{q9iT(c?N3D7KERQYW!++~2wU7nam9E`G@={U%bvTm(~51vpp0g*!&K=IFDX
ze^Mx4!M|v*sbf4UO`;c{sTTC%BW1f-zWgG0^U5oIGXmy_h%eMR{qiG5eX56edMZQO
z2T}Gr{g|u{qu?H1@3>IbTq8jgEYMwKID!VZ?e%D-K-ZHG*HE@V`xql<PNIb}a`XG<
zHecH2GxyG;__p1FV*6Nb<j|9S`X*`QQPx}wv-1aZyOkz}QSgA?xlpnx7F#S<i^XBS
z;sMX=t{?QW-5l_(Lwbia($7|_)>m!wFG(YXf=jkK(pZ>@EZK0{aaQAGaMtLNCCBR=
JwSK90?HATCK#BkW

delta 440
zcmdmR!L;Ly=>#*TG>(ZDrp(G>1``WJSlV;HR7_ux!Yekpp4VaHy+!r{=0@h0W~Qcz
zX-26@i58}&n<qGIVKOl?RxmO!G*U1$vobcYGBM`mQg91b2um$0&dkqKuvJLUEYZc#
zS>YUZfNSOo1`uGISup(uGov5VJB{fYER1GMZx(D%U}3yBkLzs$NS;sRZNhes#f<y9
zncmt@5BSF@)-I>d1jNkS<@8x9)=r;&k41HQ*Bus~_V@Q#w!go}`dyTX&0_kCFRXP;
z>>ATEz5;1ij_EHzbeP2SjBl)NOnwH_H+*9?V~XyW{sKsIy<GsZih<?rf@xPcl&5=t
zXBFmpy8|k=V`8BA^!o3t>M&)^S0$$#er1)Ke(F1`4Aa{k(_egNwPX5}F<s*at1UCj
ze~0NAKUl9Zy<ITf;U}vYP{H<ypRDsZK<@v+$Oe>1XurV3w*3MV`?NVyZv%kVumZ6f
o*t+H`6(Abu>w@-%`RqW<0mPg@%mu{U+Z*QdtU1B*d19Rx0DW1U^8f$<

diff --git a/roms/SLOF b/roms/SLOF
index 7279655..f21f7a3 160000
--- a/roms/SLOF
+++ b/roms/SLOF
@@ -1 +1 @@
-Subproject commit 7279655af2eba855bd2df61303d25abd1eeb2300
+Subproject commit f21f7a3f46b557eb5923f899ce8b4401b3cc6d91
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 17+ messages in thread

* Re: [Qemu-devel] [0/10] pseries updates and cleanups
  2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
                   ` (9 preceding siblings ...)
  2012-08-08  2:10 ` [Qemu-devel] [PATCH 10/10] pseries: Update SLOF firmware image David Gibson
@ 2012-08-14 12:34 ` Alexander Graf
  2012-08-14 12:56   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
  10 siblings, 1 reply; 17+ messages in thread
From: Alexander Graf @ 2012-08-14 12:34 UTC (permalink / raw)
  To: David Gibson; +Cc: aliguori, qemu-ppc, qemu-devel

On 08/08/2012 04:10 AM, David Gibson wrote:
> Hi Alex,
>
> This series contains all my outstanding pseries updates which aren't
> dependent on getting a generic patch upstream first.  I have a number
> more which are actually more urgent to get into 1.2, but we need to
> get some word on the generic patches before I can really push those.
>
> In the meantime, if you could pull these various updates and cleanups
> into ppc-next ready for the 1.2 freeze, that would be great.

Thanks, applied all to ppc-next.


Alex

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [Qemu-devel] [Qemu-ppc] [0/10] pseries updates and cleanups
  2012-08-14 12:34 ` [Qemu-devel] [0/10] pseries updates and cleanups Alexander Graf
@ 2012-08-14 12:56   ` Alexander Graf
  2012-08-15  1:05     ` David Gibson
  0 siblings, 1 reply; 17+ messages in thread
From: Alexander Graf @ 2012-08-14 12:56 UTC (permalink / raw)
  To: David Gibson; +Cc: aliguori, qemu-ppc, qemu-devel

On 08/14/2012 02:34 PM, Alexander Graf wrote:
> On 08/08/2012 04:10 AM, David Gibson wrote:
>> Hi Alex,
>>
>> This series contains all my outstanding pseries updates which aren't
>> dependent on getting a generic patch upstream first.  I have a number
>> more which are actually more urgent to get into 1.2, but we need to
>> get some word on the generic patches before I can really push those.
>>
>> In the meantime, if you could pull these various updates and cleanups
>> into ppc-next ready for the 1.2 freeze, that would be great.
>
> Thanks, applied all to ppc-next.

I also went manually through the queue and fixed up the authors of a few 
patches to reflect the first person in the sob line. Pretty annoying.


Alex

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [Qemu-devel] [Qemu-ppc] [0/10] pseries updates and cleanups
  2012-08-14 12:56   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
@ 2012-08-15  1:05     ` David Gibson
  2012-08-15  9:30       ` Alexander Graf
  0 siblings, 1 reply; 17+ messages in thread
From: David Gibson @ 2012-08-15  1:05 UTC (permalink / raw)
  To: Alexander Graf; +Cc: aliguori, qemu-ppc, qemu-devel

On Tue, Aug 14, 2012 at 02:56:43PM +0200, Alexander Graf wrote:
> On 08/14/2012 02:34 PM, Alexander Graf wrote:
> >On 08/08/2012 04:10 AM, David Gibson wrote:
> >>Hi Alex,
> >>
> >>This series contains all my outstanding pseries updates which aren't
> >>dependent on getting a generic patch upstream first.  I have a number
> >>more which are actually more urgent to get into 1.2, but we need to
> >>get some word on the generic patches before I can really push those.
> >>
> >>In the meantime, if you could pull these various updates and cleanups
> >>into ppc-next ready for the 1.2 freeze, that would be great.
> >
> >Thanks, applied all to ppc-next.
> 
> I also went manually through the queue and fixed up the authors of a
> few patches to reflect the first person in the sob line. Pretty
> annoying.

Ah.  That may or may not have been the right thing.  I thought I'd
gone through and corrected those patches where the author got
clobbered by git citool --amend, but it's possible I missed some.  On
the other hand there were some where I deliberately left the author as
myself because although the person in the first S-o-b wrote an initial
version - or an initial piece, I'd essentially rewritten the patch
later.  I'm not really sure what the right protocol is in cases like
that.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [Qemu-devel] [Qemu-ppc] [0/10] pseries updates and cleanups
  2012-08-15  1:05     ` David Gibson
@ 2012-08-15  9:30       ` Alexander Graf
  0 siblings, 0 replies; 17+ messages in thread
From: Alexander Graf @ 2012-08-15  9:30 UTC (permalink / raw)
  To: David Gibson; +Cc: aliguori, qemu-ppc, qemu-devel


On 15.08.2012, at 03:05, David Gibson wrote:

> On Tue, Aug 14, 2012 at 02:56:43PM +0200, Alexander Graf wrote:
>> On 08/14/2012 02:34 PM, Alexander Graf wrote:
>>> On 08/08/2012 04:10 AM, David Gibson wrote:
>>>> Hi Alex,
>>>> 
>>>> This series contains all my outstanding pseries updates which aren't
>>>> dependent on getting a generic patch upstream first.  I have a number
>>>> more which are actually more urgent to get into 1.2, but we need to
>>>> get some word on the generic patches before I can really push those.
>>>> 
>>>> In the meantime, if you could pull these various updates and cleanups
>>>> into ppc-next ready for the 1.2 freeze, that would be great.
>>> 
>>> Thanks, applied all to ppc-next.
>> 
>> I also went manually through the queue and fixed up the authors of a
>> few patches to reflect the first person in the sob line. Pretty
>> annoying.
> 
> Ah.  That may or may not have been the right thing.  I thought I'd
> gone through and corrected those patches where the author got
> clobbered by git citool --amend, but it's possible I missed some.  On
> the other hand there were some where I deliberately left the author as
> myself because although the person in the first S-o-b wrote an initial
> version - or an initial piece, I'd essentially rewritten the patch
> later.  I'm not really sure what the right protocol is in cases like
> that.

Anthony?


Alex

^ permalink raw reply	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2012-08-15  9:30 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-08-08  2:10 [Qemu-devel] [0/10] pseries updates and cleanups David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 01/10] pseries: Update SLOF David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 02/10] pseries: Remove extraneous prints David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 03/10] pseries: Rework irq assignment to avoid carrying qemu_irqs around David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 04/10] pseries: Separate PCI RTAS setup from common from emulation specific PCI setup David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 05/10] pseries: added allocator for a block of IRQs David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 06/10] pseries: Export find_phb() utility function for PCI code David Gibson
2012-08-14 11:45   ` Alexander Graf
2012-08-15  1:03     ` [Qemu-devel] [Qemu-ppc] " David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 07/10] pseries: Add trace event for PCI irqs David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 08/10] pseries: Add PCI MSI/MSI-X support David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 09/10] pseries dma: DMA window params added to PHB and DT population changed David Gibson
2012-08-08  2:10 ` [Qemu-devel] [PATCH 10/10] pseries: Update SLOF firmware image David Gibson
2012-08-14 12:34 ` [Qemu-devel] [0/10] pseries updates and cleanups Alexander Graf
2012-08-14 12:56   ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2012-08-15  1:05     ` David Gibson
2012-08-15  9:30       ` Alexander Graf

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