From: Meador Inge <meadori@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH] target-mips: Enable access to required RDHWR hardware registers
Date: Mon, 20 Aug 2012 18:41:42 -0500 [thread overview]
Message-ID: <1345506102-8444-1-git-send-email-meadori@codesourcery.com> (raw)
While running in the usermode emulator all of the MIPS32r2 *required*
RDHWR hardware registers should be accessible (the Linux kernel enables
access to these same registers).
Signed-off-by: Meador Inge <meadori@codesourcery.com>
---
target-mips/translate.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 47daf85..849e75d 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12768,8 +12768,11 @@ void cpu_state_reset(CPUMIPSState *env)
#if defined(CONFIG_USER_ONLY)
env->hflags = MIPS_HFLAG_UM;
- /* Enable access to the SYNCI_Step register. */
- env->CP0_HWREna |= (1 << 1);
+ if (env->insn_flags & ISA_MIPS32R2) {
+ /* Enable access to the CPUNum, SYNCI_Step, CC, and CCRes RDHWR
+ hardware registers. */
+ env->CP0_HWREna |= 0x0000000F;
+ }
if (env->CP0_Config1 & (1 << CP0C1_FP)) {
env->hflags |= MIPS_HFLAG_FPU;
}
--
1.7.7.6
next reply other threads:[~2012-08-20 23:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-20 23:41 Meador Inge [this message]
2012-08-21 10:14 ` [Qemu-devel] [PATCH] target-mips: Enable access to required RDHWR hardware registers Andreas Färber
2012-08-21 15:41 ` Meador Inge
2012-08-21 15:52 ` Aurelien Jarno
2012-08-21 16:04 ` Meador Inge
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