From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T3ruT-0007AU-9M for qemu-devel@nongnu.org; Tue, 21 Aug 2012 13:06:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1T3ruS-0002j7-1X for qemu-devel@nongnu.org; Tue, 21 Aug 2012 13:06:33 -0400 Received: from mail-yx0-f173.google.com ([209.85.213.173]:46780) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T3ruR-0002gw-Qz for qemu-devel@nongnu.org; Tue, 21 Aug 2012 13:06:31 -0400 Received: by mail-yx0-f173.google.com with SMTP id m4so32713yen.4 for ; Tue, 21 Aug 2012 10:06:31 -0700 (PDT) Sender: fluxion From: Michael Roth Date: Tue, 21 Aug 2012 12:05:42 -0500 Message-Id: <1345568757-14365-9-git-send-email-mdroth@linux.vnet.ibm.com> In-Reply-To: <1345568757-14365-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1345568757-14365-1-git-send-email-mdroth@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH 08/23] ehci: fix reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@us.ibm.com From: Gerd Hoffmann Check for the reset bit first when processing USBCMD register writes. Also break out of the switch, there is no need to check the other bits. Signed-off-by: Gerd Hoffmann (cherry picked from commit 7046530c36fa3a3f87692bdb54556f5d891a9c03) Signed-off-by: Michael Roth --- hw/usb/hcd-ehci.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index e759c99..5855c5d 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -1064,6 +1064,12 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) /* Do any register specific pre-write processing here. */ switch(addr) { case USBCMD: + if (val & USBCMD_HCRESET) { + ehci_reset(s); + val = s->usbcmd; + break; + } + if ((val & USBCMD_RUNSTOP) && !(s->usbcmd & USBCMD_RUNSTOP)) { qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock)); SET_LAST_RUN_CLOCK(s); @@ -1077,10 +1083,6 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) ehci_set_usbsts(s, USBSTS_HALT); } - if (val & USBCMD_HCRESET) { - ehci_reset(s); - val = s->usbcmd; - } /* not supporting dynamic frame list size at the moment */ if ((val & USBCMD_FLS) && !(s->usbcmd & USBCMD_FLS)) { -- 1.7.9.5