* [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD
@ 2012-08-23 0:55 Scott Wood
2012-08-23 0:55 ` [Qemu-devel] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base Scott Wood
2012-09-25 7:47 ` [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD Alexander Graf
0 siblings, 2 replies; 7+ messages in thread
From: Scott Wood @ 2012-08-23 0:55 UTC (permalink / raw)
To: Alexander Graf; +Cc: qemu-ppc, qemu-devel
An allowance of 5 MiB for BSS is not enough for Linux kernels with certain
debug options enabled (not sure exactly which one caused it, but I'd guess
lockdep). The kernel I ran into this with had a BSS of around 6.4 MB.
Unfortunately, uImage does not give us enough information to determine the
actual BSS size. Increase the allowance to 18 MiB to give us plenty of
room. Eventually this should be more intelligent, possibly packing
initrd+dtb at the end of guest RAM.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
hw/ppc/e500.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 6f0de6d..1ccfd7c 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -36,7 +36,7 @@
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define UIMAGE_LOAD_BASE 0
-#define DTC_LOAD_PAD 0x500000
+#define DTC_LOAD_PAD 0x1800000
#define DTC_PAD_MASK 0xFFFFF
#define INITRD_LOAD_PAD 0x2000000
#define INITRD_PAD_MASK 0xFFFFFF
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base
2012-08-23 0:55 [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD Scott Wood
@ 2012-08-23 0:55 ` Scott Wood
2012-09-25 7:49 ` Alexander Graf
2012-09-25 7:47 ` [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD Alexander Graf
1 sibling, 1 reply; 7+ messages in thread
From: Scott Wood @ 2012-08-23 0:55 UTC (permalink / raw)
To: Alexander Graf; +Cc: qemu-ppc, qemu-devel
While investigating dtb pad issues, I noticed that initrd_base wasn't taking
loadaddr into account the way dt_base was. This seems wrong.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
hw/ppc/e500.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 1ccfd7c..60ddd85 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -553,7 +553,8 @@ void ppce500_init(PPCE500Params *params)
/* Load initrd. */
if (params->initrd_filename) {
- initrd_base = (kernel_size + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
+ initrd_base = (loadaddr + kernel_size + INITRD_LOAD_PAD) &
+ ~INITRD_PAD_MASK;
initrd_size = load_image_targphys(params->initrd_filename, initrd_base,
ram_size - initrd_base);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD
2012-08-23 0:55 [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD Scott Wood
2012-08-23 0:55 ` [Qemu-devel] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base Scott Wood
@ 2012-09-25 7:47 ` Alexander Graf
1 sibling, 0 replies; 7+ messages in thread
From: Alexander Graf @ 2012-09-25 7:47 UTC (permalink / raw)
To: Scott Wood; +Cc: qemu-ppc, qemu-devel
On 23.08.2012, at 02:55, Scott Wood wrote:
> An allowance of 5 MiB for BSS is not enough for Linux kernels with certain
> debug options enabled (not sure exactly which one caused it, but I'd guess
> lockdep). The kernel I ran into this with had a BSS of around 6.4 MB.
>
> Unfortunately, uImage does not give us enough information to determine the
> actual BSS size. Increase the allowance to 18 MiB to give us plenty of
> room. Eventually this should be more intelligent, possibly packing
> initrd+dtb at the end of guest RAM.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
Thanks, applied to ppc-next.
Alex
> ---
> hw/ppc/e500.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 6f0de6d..1ccfd7c 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -36,7 +36,7 @@
>
> #define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
> #define UIMAGE_LOAD_BASE 0
> -#define DTC_LOAD_PAD 0x500000
> +#define DTC_LOAD_PAD 0x1800000
> #define DTC_PAD_MASK 0xFFFFF
> #define INITRD_LOAD_PAD 0x2000000
> #define INITRD_PAD_MASK 0xFFFFFF
> --
> 1.7.9.5
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base
2012-08-23 0:55 ` [Qemu-devel] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base Scott Wood
@ 2012-09-25 7:49 ` Alexander Graf
2012-09-28 19:52 ` [Qemu-devel] [Qemu-ppc] " folkert
0 siblings, 1 reply; 7+ messages in thread
From: Alexander Graf @ 2012-09-25 7:49 UTC (permalink / raw)
To: Scott Wood; +Cc: qemu-ppc, qemu-devel
On 23.08.2012, at 02:55, Scott Wood wrote:
> While investigating dtb pad issues, I noticed that initrd_base wasn't taking
> loadaddr into account the way dt_base was. This seems wrong.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
Ah, all the images I tested start off from address 0. But yes, we should add the kernel load offset as well.
Thanks, applied to ppc-next.
Alex
> ---
> hw/ppc/e500.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 1ccfd7c..60ddd85 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -553,7 +553,8 @@ void ppce500_init(PPCE500Params *params)
>
> /* Load initrd. */
> if (params->initrd_filename) {
> - initrd_base = (kernel_size + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
> + initrd_base = (loadaddr + kernel_size + INITRD_LOAD_PAD) &
> + ~INITRD_PAD_MASK;
> initrd_size = load_image_targphys(params->initrd_filename, initrd_base,
> ram_size - initrd_base);
>
> --
> 1.7.9.5
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base
2012-09-25 7:49 ` Alexander Graf
@ 2012-09-28 19:52 ` folkert
2012-09-28 20:11 ` Scott Wood
2012-09-29 1:52 ` Alexander Graf
0 siblings, 2 replies; 7+ messages in thread
From: folkert @ 2012-09-28 19:52 UTC (permalink / raw)
To: Alexander Graf; +Cc: Scott Wood, qemu-ppc, qemu-devel
On Tue, Sep 25, 2012 at 09:49:08AM +0200, Alexander Graf wrote:
> > While investigating dtb pad issues, I noticed that initrd_base wasn't taking
> > loadaddr into account the way dt_base was. This seems wrong.
> >
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
>
> Ah, all the images I tested start off from address 0. But yes, we should add the kernel load offset as well.
> Thanks, applied to ppc-next.
Isn't the aix kernel starting at offset 16384?
Folkert van Heusden
--
MultiTail na wan makriki wrokosani fu tan luku den logfile nanga san
den commando spiti puru. Piki puru spesrutu sani, wroko nanga difrenti
kroru, tya kon makandra, nanga wan lo moro.
http://www.vanheusden.com/multitail/
----------------------------------------------------------------------
Phone: +31-6-41278122, PGP-key: 1F28D8AE, www.vanheusden.com
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base
2012-09-28 19:52 ` [Qemu-devel] [Qemu-ppc] " folkert
@ 2012-09-28 20:11 ` Scott Wood
2012-09-29 1:52 ` Alexander Graf
1 sibling, 0 replies; 7+ messages in thread
From: Scott Wood @ 2012-09-28 20:11 UTC (permalink / raw)
To: folkert; +Cc: qemu-ppc, Alexander Graf, qemu-devel
On 09/28/2012 02:52:15 PM, folkert wrote:
> On Tue, Sep 25, 2012 at 09:49:08AM +0200, Alexander Graf wrote:
> > > While investigating dtb pad issues, I noticed that initrd_base
> wasn't taking
> > > loadaddr into account the way dt_base was. This seems wrong.
> > >
> > > Signed-off-by: Scott Wood <scottwood@freescale.com>
> >
> > Ah, all the images I tested start off from address 0. But yes, we
> should add the kernel load offset as well.
> > Thanks, applied to ppc-next.
>
> Isn't the aix kernel starting at offset 16384?
I doubt the AIX kernel will run on e500. :-)
-Scott
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base
2012-09-28 19:52 ` [Qemu-devel] [Qemu-ppc] " folkert
2012-09-28 20:11 ` Scott Wood
@ 2012-09-29 1:52 ` Alexander Graf
1 sibling, 0 replies; 7+ messages in thread
From: Alexander Graf @ 2012-09-29 1:52 UTC (permalink / raw)
To: folkert; +Cc: Scott Wood, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
On 28.09.2012, at 21:52, folkert <folkert@vanheusden.com> wrote:
> On Tue, Sep 25, 2012 at 09:49:08AM +0200, Alexander Graf wrote:
>>> While investigating dtb pad issues, I noticed that initrd_base wasn't taking
>>> loadaddr into account the way dt_base was. This seems wrong.
>>>
>>> Signed-off-by: Scott Wood <scottwood@freescale.com>
>>
>> Ah, all the images I tested start off from address 0. But yes, we should add the kernel load offset as well.
>> Thanks, applied to ppc-next.
>
> Isn't the aix kernel starting at offset 16384?
AIX does not run on e500 style cores :)
Alex
>
>
> Folkert van Heusden
>
> --
> MultiTail na wan makriki wrokosani fu tan luku den logfile nanga san
> den commando spiti puru. Piki puru spesrutu sani, wroko nanga difrenti
> kroru, tya kon makandra, nanga wan lo moro.
> http://www.vanheusden.com/multitail/
> ----------------------------------------------------------------------
> Phone: +31-6-41278122, PGP-key: 1F28D8AE, www.vanheusden.com
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2012-09-29 1:52 UTC | newest]
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2012-08-23 0:55 [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD Scott Wood
2012-08-23 0:55 ` [Qemu-devel] [PATCH 2/2] PPC: e500: calculate initrd_base like dt_base Scott Wood
2012-09-25 7:49 ` Alexander Graf
2012-09-28 19:52 ` [Qemu-devel] [Qemu-ppc] " folkert
2012-09-28 20:11 ` Scott Wood
2012-09-29 1:52 ` Alexander Graf
2012-09-25 7:47 ` [Qemu-devel] [PATCH 1/2] PPC: e500: increase DTC_LOAD_PAD Alexander Graf
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