From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56555) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAWM5-0002Ag-DH for qemu-devel@nongnu.org; Sat, 08 Sep 2012 21:30:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAWM4-0003YY-I6 for qemu-devel@nongnu.org; Sat, 08 Sep 2012 21:30:33 -0400 Received: from mail-lb0-f173.google.com ([209.85.217.173]:53999) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAWM4-0003YP-9P for qemu-devel@nongnu.org; Sat, 08 Sep 2012 21:30:32 -0400 Received: by lbbgm13 with SMTP id gm13so479700lbb.4 for ; Sat, 08 Sep 2012 18:30:31 -0700 (PDT) From: Max Filippov Date: Sun, 9 Sep 2012 05:29:49 +0400 Message-Id: <1347154198-8629-1-git-send-email-jcmvbkbc@gmail.com> Subject: [Qemu-devel] [PATCH 0/9] target-xtensa: implement FP coprocessor option List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Max Filippov This series implements floating point coprocessor and coprocessor context options for xtensa and fixes a couple of bugs to make it work. Max Filippov (9): softfloat: make float_muladd_negate_* flags independent target-xtensa: handle boolean option in overlays target-xtensa: specialize softfloat NaN rules target-xtensa: add FP registers target-xtensa: implement LSCX and LSCI groups target-xtensa: implement FP0 arithmetic target-xtensa: implement FP0 conversions target-xtensa: implement FP1 group target-xtensa: implement coprocessor context option fpu/softfloat-specialize.h | 9 +- fpu/softfloat.h | 2 +- gdbstub.c | 8 + target-xtensa/cpu.h | 8 + target-xtensa/helper.h | 21 +++ target-xtensa/op_helper.c | 140 +++++++++++++++++ target-xtensa/overlay_tool.h | 1 + target-xtensa/translate.c | 337 ++++++++++++++++++++++++++++++++++++++++-- 8 files changed, 510 insertions(+), 16 deletions(-) -- 1.7.7.6