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From: Max Filippov <jcmvbkbc@gmail.com>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Max Filippov <jcmvbkbc@gmail.com>
Subject: [Qemu-devel] [PATCH v2 04/10] target-xtensa: specialize softfloat NaN rules
Date: Sun,  9 Sep 2012 20:04:33 +0400	[thread overview]
Message-ID: <1347206679-428-5-git-send-email-jcmvbkbc@gmail.com> (raw)
In-Reply-To: <1347206679-428-1-git-send-email-jcmvbkbc@gmail.com>

NaN propagation rule: leftmost NaN in the expression gets propagated to
the result.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
Changes v1->v2:
- drop float32_maybe_silence_nan specialization

 fpu/softfloat-specialize.h |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 2b203b9..f9642f0 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -61,7 +61,8 @@ const float16 float16_default_nan = const_float16(0xFE00);
 *----------------------------------------------------------------------------*/
 #if defined(TARGET_SPARC)
 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
-#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
+#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
+      defined(TARGET_XTENSA)
 const float32 float32_default_nan = const_float32(0x7FC00000);
 #elif SNAN_BIT_IS_ONE
 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
@@ -400,7 +401,7 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
         return 1;
     }
 }
-#elif defined(TARGET_PPC)
+#elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
                    flag aIsLargerSignificand)
 {
-- 
1.7.7.6

  parent reply	other threads:[~2012-09-09 16:05 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-09 16:04 [Qemu-devel] [PATCH v2 00/10] target-xtensa: implement FP coprocessor option Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 01/10] softfloat: make float_muladd_negate_* flags independent Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 02/10] softfloat: add NO_SIGNALING_NANS Max Filippov
2012-09-09 16:18   ` Peter Maydell
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 03/10] target-xtensa: handle boolean option in overlays Max Filippov
2012-09-09 16:04 ` Max Filippov [this message]
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 05/10] target-xtensa: add FP registers Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 06/10] target-xtensa: implement LSCX and LSCI groups Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 07/10] target-xtensa: implement FP0 arithmetic Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 08/10] target-xtensa: implement FP0 conversions Max Filippov
2012-09-09 16:16   ` Peter Maydell
2012-09-09 16:38     ` Max Filippov
2012-09-09 17:24       ` Marc Gauthier
2012-09-09 18:39         ` Max Filippov
2012-09-19  0:28       ` Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 09/10] target-xtensa: implement FP1 group Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 10/10] target-xtensa: implement coprocessor context option Max Filippov

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