From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56565) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoil-0007nO-GJ for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoik-00061r-BU for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:11 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:59699) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoij-0005pQ-Tr for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:10 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so291958pbb.4 for ; Sun, 09 Sep 2012 14:07:09 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sun, 9 Sep 2012 14:05:00 -0700 Message-Id: <1347224784-19472-43-git-send-email-rth@twiddle.net> In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 042/126] target-s390: Convert SET SYSTEM MASK List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 2 ++ target-s390x/translate.c | 25 +++++++++---------------- 2 files changed, 11 insertions(+), 16 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 9d26370..7af3ba3 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -383,4 +383,6 @@ /* We only do 64-bit, so accept this as a no-op. Let SAM24 and SAM31 signal illegal instruction. */ C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0) +/* SET SYSTEM MASK */ + C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0) #endif /* CONFIG_USER_ONLY */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 11feffd..deb5cb9 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2349,22 +2349,6 @@ static void disas_s390_insn(DisasContext *s) switch (opc) { #ifndef CONFIG_USER_ONLY - case 0x80: /* SSM D2(B2) [S] */ - /* Set System Mask */ - check_privileged(s); - insn = ld_code4(s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp2 = tcg_temp_new_i64(); - tmp3 = tcg_temp_new_i64(); - tcg_gen_andi_i64(tmp3, psw_mask, ~0xff00000000000000ULL); - tcg_gen_qemu_ld8u(tmp2, tmp, get_mem_index(s)); - tcg_gen_shli_i64(tmp2, tmp2, 56); - tcg_gen_or_i64(psw_mask, tmp3, tmp2); - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - tcg_temp_free_i64(tmp3); - break; case 0x82: /* LPSW D2(B2) [S] */ /* Load PSW */ check_privileged(s); @@ -3554,6 +3538,15 @@ static ExitStatus op_ori(DisasContext *s, DisasOps *o) return NO_EXIT; } +#ifndef CONFIG_USER_ONLY +static ExitStatus op_ssm(DisasContext *s, DisasOps *o) +{ + check_privileged(s); + tcg_gen_deposit_i64(psw_mask, psw_mask, o->in2, 56, 8); + return NO_EXIT; +} +#endif + static ExitStatus op_st8(DisasContext *s, DisasOps *o) { tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s)); -- 1.7.11.4