From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56674) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAois-0007w6-6d for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAoir-00064D-13 for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:18 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:63857) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAoiq-0005xl-RU for qemu-devel@nongnu.org; Sun, 09 Sep 2012 17:07:16 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so292285pbb.4 for ; Sun, 09 Sep 2012 14:07:16 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sun, 9 Sep 2012 14:05:08 -0700 Message-Id: <1347224784-19472-51-git-send-email-rth@twiddle.net> In-Reply-To: <1347224784-19472-1-git-send-email-rth@twiddle.net> References: <1347224784-19472-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 050/126] target-s390: Convert STNSM, STOSM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf Signed-off-by: Richard Henderson --- target-s390x/insn-data.def | 4 ++++ target-s390x/translate.c | 37 +++++++++++++++++++------------------ 2 files changed, 23 insertions(+), 18 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 84ca631..52f44e0 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -444,4 +444,8 @@ C(0x010e, SAM64, E, Z, 0, 0, 0, 0, 0, 0) /* SET SYSTEM MASK */ C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0) +/* STORE THEN AND SYSTEM MASK */ + C(0xac00, STNSM, SI, Z, la1, 0, new, m1_8, stnsm, 0) +/* STORE THEN OR SYSTEM MASK */ + C(0xad00, STOSM, SI, Z, la1, 0, new, m1_8, stosm, 0) #endif /* CONFIG_USER_ONLY */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 4ddd77f..295caec 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2219,7 +2219,7 @@ static void disas_s390_insn(DisasContext *s) TCGv_i32 tmp32_1, tmp32_2; unsigned char opc; uint64_t insn; - int op, r1, r2, r3, d1, d2, x2, b1, b2, i2, r1b; + int op, r1, r2, r3, d1, d2, x2, b1, b2, r1b; TCGv_i32 vl; opc = cpu_ldub_code(cpu_single_env, s->pc); @@ -2277,23 +2277,6 @@ static void disas_s390_insn(DisasContext *s) tcg_temp_free_i32(tmp32_2); break; #ifndef CONFIG_USER_ONLY - case 0xac: /* STNSM D1(B1),I2 [SI] */ - case 0xad: /* STOSM D1(B1),I2 [SI] */ - check_privileged(s); - insn = ld_code4(s->pc); - tmp = decode_si(s, insn, &i2, &b1, &d1); - tmp2 = tcg_temp_new_i64(); - tcg_gen_shri_i64(tmp2, psw_mask, 56); - tcg_gen_qemu_st8(tmp2, tmp, get_mem_index(s)); - if (opc == 0xac) { - tcg_gen_andi_i64(psw_mask, psw_mask, - ((uint64_t)i2 << 56) | 0x00ffffffffffffffULL); - } else { - tcg_gen_ori_i64(psw_mask, psw_mask, (uint64_t)i2 << 56); - } - tcg_temp_free_i64(tmp); - tcg_temp_free_i64(tmp2); - break; case 0xae: /* SIGP R1,R3,D2(B2) [RS] */ check_privileged(s); insn = ld_code4(s->pc); @@ -3420,6 +3403,24 @@ static ExitStatus op_ssm(DisasContext *s, DisasOps *o) tcg_gen_deposit_i64(psw_mask, psw_mask, o->in2, 56, 8); return NO_EXIT; } + +static ExitStatus op_stnsm(DisasContext *s, DisasOps *o) +{ + uint64_t i2 = get_field(s->fields, i2); + check_privileged(s); + tcg_gen_shri_i64(o->out, psw_mask, 56); + tcg_gen_andi_i64(psw_mask, psw_mask, (i2 << 56) | 0x00ffffffffffffffull); + return NO_EXIT; +} + +static ExitStatus op_stosm(DisasContext *s, DisasOps *o) +{ + uint64_t i2 = get_field(s->fields, i2); + check_privileged(s); + tcg_gen_shri_i64(o->out, psw_mask, 56); + tcg_gen_ori_i64(psw_mask, psw_mask, i2 << 56); + return NO_EXIT; +} #endif static ExitStatus op_st8(DisasContext *s, DisasOps *o) -- 1.7.11.4