From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:52696) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDO0U-0000xF-Uy for qemu-devel@nongnu.org; Sun, 16 Sep 2012 19:12:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TDO0R-0008AC-Mx for qemu-devel@nongnu.org; Sun, 16 Sep 2012 19:12:06 -0400 Received: from hall.aurel32.net ([88.191.126.93]:47760) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDO0R-00089g-GN for qemu-devel@nongnu.org; Sun, 16 Sep 2012 19:12:03 -0400 From: Aurelien Jarno Date: Mon, 17 Sep 2012 01:11:54 +0200 Message-Id: <1347837120-14422-6-git-send-email-aurelien@aurel32.net> In-Reply-To: <1347837120-14422-1-git-send-email-aurelien@aurel32.net> References: <1347837120-14422-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH 05/11] target-sh4: optimize xtrct List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aurelien Jarno The register being 32 bit long, after a shift to the right by 16 bits, the upper 16 bit are already cleared. There is no need to call ext16u to clear them. Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 41a1f22..92c5a1f 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -751,7 +751,6 @@ static void _decode_opc(DisasContext * ctx) tcg_gen_shli_i32(high, REG(B7_4), 16); low = tcg_temp_new(); tcg_gen_shri_i32(low, REG(B11_8), 16); - tcg_gen_ext16u_i32(low, low); tcg_gen_or_i32(REG(B11_8), high, low); tcg_temp_free(low); tcg_temp_free(high); -- 1.7.10.4