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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 07/11] target-sh4: remove gen_clr_t() and gen_set_t()
Date: Mon, 17 Sep 2012 01:11:56 +0200	[thread overview]
Message-ID: <1347837120-14422-8-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1347837120-14422-1-git-send-email-aurelien@aurel32.net>

gen_clr_t() and gen_set_t() have very few callers and can be remplaced
by a single line. Remove them.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-sh4/translate.c |   16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 9ecbe47..cdc4e3b 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -339,16 +339,6 @@ static void gen_delayed_conditional_jump(DisasContext * ctx)
     gen_jump(ctx);
 }
 
-static inline void gen_set_t(void)
-{
-    tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_T);
-}
-
-static inline void gen_clr_t(void)
-{
-    tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T);
-}
-
 static inline void gen_cmp(int cond, TCGv t0, TCGv t1)
 {
     TCGv t;
@@ -519,7 +509,7 @@ static void _decode_opc(DisasContext * ctx)
 	tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_S);
 	return;
     case 0x0008:		/* clrt */
-	gen_clr_t();
+        tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T);
 	return;
     case 0x0038:		/* ldtlb */
 	CHECK_PRIVILEGED
@@ -537,7 +527,7 @@ static void _decode_opc(DisasContext * ctx)
 	tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_S);
 	return;
     case 0x0018:		/* sett */
-	gen_set_t();
+        tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_T);
 	return;
     case 0xfbfd:		/* frchg */
 	tcg_gen_xori_i32(cpu_fpscr, cpu_fpscr, FPSCR_FR);
@@ -1660,7 +1650,7 @@ static void _decode_opc(DisasContext * ctx)
         */
         if (ctx->features & SH_FEATURE_SH4A) {
 	    int label = gen_new_label();
-	    gen_clr_t();
+            tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T);
 	    tcg_gen_or_i32(cpu_sr, cpu_sr, cpu_ldst);
 	    tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ldst, 0, label);
 	    tcg_gen_qemu_st32(REG(0), REG(B11_8), ctx->memidx);
-- 
1.7.10.4

  parent reply	other threads:[~2012-09-16 23:12 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-16 23:11 [Qemu-devel] [PATCH 00/11] target-sh4: misc optimizations and cleanup Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 01/11] target-sh4: mark a few helpers const and pure Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 02/11] target-sh4: use float32_muladd() to implement fmac Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 03/11] target-sh4: implement addc and subc using TCG Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 04/11] target-sh4: implement addv and subv " Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 05/11] target-sh4: optimize xtrct Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 06/11] target-sh4: optimize swap.w Aurelien Jarno
2012-09-16 23:11 ` Aurelien Jarno [this message]
2012-09-16 23:11 ` [Qemu-devel] [PATCH 08/11] target-sh4: rework exceptions handling Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 09/11] target-sh4: cleanup DisasContext Aurelien Jarno
2012-09-16 23:11 ` [Qemu-devel] [PATCH 10/11] target-sh4: remove useless code Aurelien Jarno
2012-09-16 23:12 ` [Qemu-devel] [PATCH 11/11] gdbstub/sh4: fix build with USE_SOFTFLOAT_STRUCT_TYPES Aurelien Jarno

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