From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40352) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDdGD-0004vC-KN for qemu-devel@nongnu.org; Mon, 17 Sep 2012 11:29:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TDdG9-0005oW-CU for qemu-devel@nongnu.org; Mon, 17 Sep 2012 11:29:21 -0400 Received: from mail-qa0-f52.google.com ([209.85.216.52]:51587) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TDdG9-0005gZ-8y for qemu-devel@nongnu.org; Mon, 17 Sep 2012 11:29:17 -0400 Received: by mail-qa0-f52.google.com with SMTP id g14so1598216qab.4 for ; Mon, 17 Sep 2012 08:29:17 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 17 Sep 2012 08:28:51 -0700 Message-Id: <1347895732-22212-13-git-send-email-rth@twiddle.net> In-Reply-To: <1347895732-22212-1-git-send-email-rth@twiddle.net> References: <1347895732-22212-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 12/13] tcg-sparc: Fix and enable direct TB chaining. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com Signed-off-by: Richard Henderson --- exec-all.h | 9 ++++++--- tcg/sparc/tcg-target.c | 19 ++++++++++++++++--- 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/exec-all.h b/exec-all.h index dba9609..6516da0 100644 --- a/exec-all.h +++ b/exec-all.h @@ -132,9 +132,10 @@ static inline void tlb_flush(CPUArchState *env, int flush_global) #define CODE_GEN_AVG_BLOCK_SIZE 64 #endif -#if defined(_ARCH_PPC) || defined(__x86_64__) || defined(__arm__) || defined(__i386__) -#define USE_DIRECT_JUMP -#elif defined(CONFIG_TCG_INTERPRETER) +#if defined(__arm__) || defined(_ARCH_PPC) \ + || defined(__x86_64__) || defined(__i386__) \ + || defined(__sparc__) \ + || defined(CONFIG_TCG_INTERPRETER) #define USE_DIRECT_JUMP #endif @@ -244,6 +245,8 @@ static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr) __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg)); #endif } +#elif defined(__sparc__) +void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr); #else #error tb_set_jmp_target1 is missing #endif diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 03c385a..58d7a3d 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1072,10 +1072,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_goto_tb: if (s->tb_jmp_offset) { /* direct jump method */ - tcg_out_sethi(s, TCG_REG_T1, args[0] & 0xffffe000); - tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_T1) | - INSN_IMM13((args[0] & 0x1fff))); s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf; + tcg_out32(s, CALL | (8 >> 2)); } else { /* indirect jump method */ tcg_out_ld_ptr(s, TCG_REG_T1, @@ -1595,3 +1593,18 @@ void tcg_register_jit(void *buf, size_t buf_size) tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame)); } + +void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr) +{ + uint32_t *ptr = (uint32_t *)jmp_addr; + tcg_target_long disp = (tcg_target_long)(addr - jmp_addr) >> 2; + + /* We can reach the entire address space for 32-bit. For 64-bit + the code_gen_buffer can't be larger than 2GB. */ + if (TCG_TARGET_REG_BITS == 64 && !check_fit_tl(disp, 30)) { + tcg_abort(); + } + + *ptr = CALL | (disp & 0x3fffffff); + flush_icache_range(jmp_addr, jmp_addr + 4); +} -- 1.7.11.4