From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58829) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TECK8-00019f-Mu for qemu-devel@nongnu.org; Wed, 19 Sep 2012 00:55:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TECK7-0004wN-NQ for qemu-devel@nongnu.org; Wed, 19 Sep 2012 00:55:44 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:41839) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TECK7-0004vo-Gb for qemu-devel@nongnu.org; Wed, 19 Sep 2012 00:55:43 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp12so1579897pbb.4 for ; Tue, 18 Sep 2012 21:55:43 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 18 Sep 2012 21:55:34 -0700 Message-Id: <1348030534-14059-4-git-send-email-rth@twiddle.net> In-Reply-To: <1348030534-14059-1-git-send-email-rth@twiddle.net> References: <1348030534-14059-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 3/3] target-mips: Always evaluate debugging macro arguments List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aurelien@aurel32.net this will prevent some of the compilation errors with debugging enabled from creeping back in. Signed-off-by: Richard Henderson --- target-mips/translate.c | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index f93b444..4e04e97 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -28,7 +28,7 @@ #define GEN_HELPER 1 #include "helper.h" -//#define MIPS_DEBUG_DISAS +#define MIPS_DEBUG_DISAS 0 //#define MIPS_DEBUG_SIGN_EXTENSIONS /* MIPS major opcodes */ @@ -566,22 +566,25 @@ static const char *fregnames[] = "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", }; -#ifdef MIPS_DEBUG_DISAS -#define MIPS_DEBUG(fmt, ...) \ - qemu_log_mask(CPU_LOG_TB_IN_ASM, \ - TARGET_FMT_lx ": %08x " fmt "\n", \ - ctx->pc, ctx->opcode , ## __VA_ARGS__) -#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) -#else -#define MIPS_DEBUG(fmt, ...) do { } while(0) -#define LOG_DISAS(...) do { } while (0) -#endif +#define MIPS_DEBUG(fmt, ...) \ + do { \ + if (MIPS_DEBUG_DISAS) { \ + qemu_log_mask(CPU_LOG_TB_IN_ASM, \ + TARGET_FMT_lx ": %08x " fmt "\n", \ + ctx->pc, ctx->opcode , ## __VA_ARGS__); \ + } \ + } while (0) + +#define LOG_DISAS(...) \ + do { \ + if (MIPS_DEBUG_DISAS) { \ + qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__); \ + } \ + } while (0) #define MIPS_INVAL(op) \ -do { \ MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \ - ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)); \ -} while (0) + ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)) /* General purpose registers moves. */ static inline void gen_load_gpr (TCGv t, int reg) -- 1.7.11.4