[Qemu-devel] [PATCH v4 00/17] Allow changing of Hypervisor CPUIDs.

[Qemu-devel] [PATCH v4 00/17] Allow changing of Hypervisor CPUIDs.

[Don Slutz]

Also known as Paravirtualization CPUIDs.

This is primarily done so that the guest will think it is running
under vmware when hypervisor-vendor=vmware is specified as a
property of a cpu.


This depends on:

http://lists.gnu.org/archive/html/qemu-devel/2012-09/msg01400.html

As far as I know it is #4. It depends on (1) and (2) and (3).

This change is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

Changes from v3 to v4:
  Added CPUID_HV_LEVEL_HYPERV, CPUID_HV_LEVEL_KVM.
  Added CPUID_HV_VENDOR_HYPERV.
  Added hyperv as known hypservisor-vendor.
  Allow hypervisor-level to be 0.

Changes from v2 to v3:
  Clean post to qemu-devel.

Changes from v1 to v2:

1) Added 1/4 from http://lists.gnu.org/archive/html/qemu-devel/2012-08/msg05153.html

   Because Fred is changing jobs and so will not be pushing to get
   this in. It needed to be rebased, And I needed it to complete the
   testing of this change.

2) Added 2/4 because of the re-work I needed a way to clear all KVM bits,

3) The rework of v1.  Make it fit into the object model re-work of cpu.c for x86.

4) Added 3/4 -- The split out of the code that is not needed for accel=kvm.

Changes from v2 to v3:

Marcelo Tosatti:
  Its one big patch, better split in logically correlated patches
  (with better changelog). This would help reviewers.

So split 3 and 4 into 3 to 17.  More info in change log.
No code change.

Don Slutz (17):
  target-i386: Allow tsc-frequency to be larger then 2.147G
  target-i386: Add missing kvm bits.
  target-i386: Add Hypervisor level.
  target-i386: Add cpu object access routines for Hypervisor level.
  target-i386: Add x86_set_hyperv.
  target-i386: Use Hypervisor level in -machine pc,accel=kvm.
  target-i386: Use Hypervisor level in -machine pc,accel=tcg.
  target-i386: Add Hypervisor vendor.
  target-i386: Add cpu object access routines for Hypervisor vendor.
  target-i386: Use Hypervisor vendor in -machine pc,accel=kvm.
  target-i386: Use Hypervisor vendor in -machine pc,accel=tcg.
  target-i386: Add some known names to Hypervisor vendor.
  target-i386: Add optional Hypervisor leaf extra.
  target-i386: Add cpu object access routines for Hypervisor leaf
    extra.
  target-i386: Add setting of Hypervisor leaf extra for known vmare4.
  target-i386: Use Hypervisor leaf extra in -machine pc,accel=kvm.
  target-i386: Use Hypervisor leaf extra in -machine pc,accel=tcg.

 target-i386/cpu.c |  277 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
 target-i386/cpu.h |   29 ++++++
 target-i386/kvm.c |   36 ++++++-
 3 files changed, 331 insertions(+), 11 deletions(-)

[Qemu-devel] [PATCH v4 01/17] target-i386: Allow tsc-frequency to be larger then 2.147G

[Don Slutz]

The check using INT_MAX (2147483647) is wrong in this case.

Signed-off-by: Fred Oliveira <foliveira@cloudswitch.com>
Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index af50a8f..0313cf5 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1146,7 +1146,7 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque,
 {
     X86CPU *cpu = X86_CPU(obj);
     const int64_t min = 0;
-    const int64_t max = INT_MAX;
+    const int64_t max = INT64_MAX;
     int64_t value;
 
     visit_type_freq(v, &value, name, errp);
-- 
1.7.1

[Qemu-devel] [PATCH v4 02/17] target-i386: Add missing kvm bits.

[Don Slutz]

Fix duplicate name (kvmclock => kvm_clock2) also.

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0313cf5..5f9866a 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -87,10 +87,14 @@ static const char *ext3_feature_name[] = {
 };
 
 static const char *kvm_feature_name[] = {
-    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, "kvm_pv_eoi", NULL,
-    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvm_clock2",
+    "kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", NULL,
+    NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL,
+    "kvm_clock_stable", NULL, NULL, NULL,
+    NULL, NULL, NULL, NULL,
 };
 
 static const char *svm_feature_name[] = {
-- 
1.7.1

[Qemu-devel] [PATCH v4 03/17] target-i386: Add Hypervisor level.

[Don Slutz]

Also known as Paravirtualization level or maximim cpuid function present in this leaf.
This is just the EAX value for 0x40000000.

QEMU knows this is KVM_CPUID_SIGNATURE (0x40000000).

This is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

QEMU has the value HYPERV_CPUID_MIN defined.

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 5265c5a..05c0848 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -782,6 +782,8 @@ typedef struct CPUX86State {
     uint32_t cpuid_ext4_features;
     /* Flags from CPUID[EAX=7,ECX=0].EBX */
     uint32_t cpuid_7_0_ebx;
+    /* Hypervisor CPUIDs */
+    uint32_t cpuid_hv_level;
 
     /* MTRRs */
     uint64_t mtrr_fixed[11];
-- 
1.7.1

[Qemu-devel] [PATCH v4 04/17] target-i386: Add cpu object access routines for Hypervisor level.

[Don Slutz]

These are modeled after x86_cpuid_get_xlevel and x86_cpuid_set_xlevel.

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5f9866a..0e4a18d 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1166,6 +1166,31 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque,
     cpu->env.tsc_khz = value / 1000;
 }
 
+static void x86_cpuid_get_hv_level(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    visit_type_uint32(v, &cpu->env.cpuid_hv_level, name, errp);
+}
+
+static void x86_cpuid_set_hv_level(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+    uint32_t value;
+
+    visit_type_uint32(v, &value, name, errp);
+    if (error_is_set(errp)) {
+        return;
+    }
+
+    if ((value != 0) && (value < 0x40000000)) {
+        value += 0x40000000;
+    }
+    cpu->env.cpuid_hv_level = value;
+}
+
 #if !defined(CONFIG_USER_ONLY)
 static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
                                  const char *name, Error **errp)
@@ -2061,6 +2086,9 @@ static void x86_cpu_initfn(Object *obj)
     object_property_add(obj, "enforce", "bool",
                         x86_cpuid_get_enforce,
                         x86_cpuid_set_enforce, NULL, NULL, NULL);
+    object_property_add(obj, "hypervisor-level", "int",
+                        x86_cpuid_get_hv_level,
+                        x86_cpuid_set_hv_level, NULL, NULL, NULL);
 #if !defined(CONFIG_USER_ONLY)
     object_property_add(obj, "hv_spinlocks", "int",
                         x86_get_hv_spinlocks,
-- 
1.7.1

[Qemu-devel] [PATCH v4 05/17] target-i386: Add x86_set_hyperv.

[Don Slutz]

This is used to set the cpu object's hypervisor level to the default for Microsoft's Hypervisor.

HYPERV_CPUID_MIN (0x40000005) is defined in a linux header file.
CPUID_HV_LEVEL_HYPERV (0x40000005) is used instead.

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   10 ++++++++++
 target-i386/cpu.h |    2 ++
 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0e4a18d..6aeb194 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1192,6 +1192,13 @@ static void x86_cpuid_set_hv_level(Object *obj, Visitor *v, void *opaque,
 }
 
 #if !defined(CONFIG_USER_ONLY)
+static void x86_set_hyperv(Object *obj, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    cpu->env.cpuid_hv_level = CPUID_HV_LEVEL_HYPERV;
+}
+
 static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
                                  const char *name, Error **errp)
 {
@@ -1214,6 +1221,7 @@ static void x86_set_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
         return;
     }
     hyperv_set_spinlock_retries(value);
+    x86_set_hyperv(obj, errp);
 }
 
 static void x86_get_hv_relaxed(Object *obj, Visitor *v, void *opaque,
@@ -1234,6 +1242,7 @@ static void x86_set_hv_relaxed(Object *obj, Visitor *v, void *opaque,
         return;
     }
     hyperv_enable_relaxed_timing(value);
+    x86_set_hyperv(obj, errp);
 }
 
 static void x86_get_hv_vapic(Object *obj, Visitor *v, void *opaque,
@@ -1254,6 +1263,7 @@ static void x86_set_hv_vapic(Object *obj, Visitor *v, void *opaque,
         return;
     }
     hyperv_enable_vapic_recommended(value);
+    x86_set_hyperv(obj, errp);
 }
 #endif
 
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 05c0848..7fc7906 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -488,6 +488,8 @@
 
 #define CPUID_VENDOR_VIA   "CentaurHauls"
 
+#define CPUID_HV_LEVEL_HYPERV  0x40000005
+
 #define CPUID_MWAIT_IBE     (1 << 1) /* Interrupts can exit capability */
 #define CPUID_MWAIT_EMX     (1 << 0) /* enumeration supported */
 
-- 
1.7.1

[Qemu-devel] [PATCH v4 06/17] target-i386: Use Hypervisor level in -machine pc, accel=kvm.

[Don Slutz]

Also known as Paravirtualization level.

This change is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

QEMU knows this is KVM_CPUID_SIGNATURE (0x40000000).

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/kvm.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 895d848..bf27793 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -389,12 +389,12 @@ int kvm_arch_init_vcpu(CPUX86State *env)
     c = &cpuid_data.entries[cpuid_i++];
     memset(c, 0, sizeof(*c));
     c->function = KVM_CPUID_SIGNATURE;
-    if (!hyperv_enabled()) {
+    if (env->cpuid_hv_level == 0) {
         memcpy(signature, "KVMKVMKVM\0\0\0", 12);
         c->eax = 0;
     } else {
         memcpy(signature, "Microsoft Hv", 12);
-        c->eax = HYPERV_CPUID_MIN;
+        c->eax = env->cpuid_hv_level;
     }
     c->ebx = signature[0];
     c->ecx = signature[1];
-- 
1.7.1

[Qemu-devel] [PATCH v4 07/17] target-i386: Use Hypervisor level in -machine pc, accel=tcg.

[Don Slutz]

Also known as Paravirtualization level.

This change is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

QEMU knows this as KVM_CPUID_SIGNATURE (0x40000000) in kvm on linux.

This does not provide vendor support in tcg yet.

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6aeb194..b7532b7 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1651,6 +1651,16 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
                 index =  env->cpuid_xlevel;
             }
         }
+    } else if (index & 0x40000000) {
+        if (env->cpuid_hv_level > 0) {
+            /* Handle Hypervisor CPUIDs */
+            if (index > env->cpuid_hv_level) {
+                index = env->cpuid_hv_level;
+            }
+        } else {
+            if (index > env->cpuid_level)
+                index = env->cpuid_level;
+        }
     } else {
         if (index > env->cpuid_level)
             index = env->cpuid_level;
@@ -1789,6 +1799,18 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             *edx = 0;
         }
         break;
+    case 0x40000000:
+        *eax = env->cpuid_hv_level;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 0x40000001:
+        *eax = env->cpuid_kvm_features;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
     case 0x80000000:
         *eax = env->cpuid_xlevel;
         *ebx = env->cpuid_vendor1;
-- 
1.7.1

[Qemu-devel] [PATCH v4 08/17] target-i386: Add Hypervisor vendor.

[Don Slutz]

Also known as Paravirtualization vendor.
This is EBX, ECX, EDX data for 0x40000000.

QEMU knows this is KVM_CPUID_SIGNATURE (0x40000000).

This is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.h |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 7fc7906..e13a44a 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -786,6 +786,9 @@ typedef struct CPUX86State {
     uint32_t cpuid_7_0_ebx;
     /* Hypervisor CPUIDs */
     uint32_t cpuid_hv_level;
+    uint32_t cpuid_hv_vendor1;
+    uint32_t cpuid_hv_vendor2;
+    uint32_t cpuid_hv_vendor3;
 
     /* MTRRs */
     uint64_t mtrr_fixed[11];
-- 
1.7.1

[Qemu-devel] [PATCH v4 09/17] target-i386: Add cpu object access routines for Hypervisor vendor.

[Don Slutz]

These are modeled after x86_cpuid_set_vendor and x86_cpuid_get_vendor.
Since kvm's vendor is shorter, the test for correct size is removed and zero padding is added.

Set Microsoft's Vendor now that we can.  Value defined in:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx
And matches want is in target-i386/kvm.c

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   44 ++++++++++++++++++++++++++++++++++++++++++++
 target-i386/cpu.h |    2 ++
 2 files changed, 46 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b7532b7..d8f7e22 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1191,12 +1191,53 @@ static void x86_cpuid_set_hv_level(Object *obj, Visitor *v, void *opaque,
     cpu->env.cpuid_hv_level = value;
 }
 
+static char *x86_cpuid_get_hv_vendor(Object *obj, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+    CPUX86State *env = &cpu->env;
+    char *value;
+    int i;
+
+    value = (char *)g_malloc(CPUID_VENDOR_SZ + 1);
+    for (i = 0; i < 4; i++) {
+        value[i + 0] = env->cpuid_hv_vendor1 >> (8 * i);
+        value[i + 4] = env->cpuid_hv_vendor2 >> (8 * i);
+        value[i + 8] = env->cpuid_hv_vendor3 >> (8 * i);
+    }
+    value[CPUID_VENDOR_SZ] = '\0';
+
+    return value;
+}
+
+static void x86_cpuid_set_hv_vendor(Object *obj, const char *value,
+                                     Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+    CPUX86State *env = &cpu->env;
+    int i;
+    char adj_value[CPUID_VENDOR_SZ + 1];
+
+    memset(adj_value, 0, sizeof(adj_value));
+
+    pstrcpy(adj_value, sizeof(adj_value), value);
+
+    env->cpuid_hv_vendor1 = 0;
+    env->cpuid_hv_vendor2 = 0;
+    env->cpuid_hv_vendor3 = 0;
+    for (i = 0; i < 4; i++) {
+        env->cpuid_hv_vendor1 |= ((uint8_t)adj_value[i + 0]) << (8 * i);
+        env->cpuid_hv_vendor2 |= ((uint8_t)adj_value[i + 4]) << (8 * i);
+        env->cpuid_hv_vendor3 |= ((uint8_t)adj_value[i + 8]) << (8 * i);
+    }
+}
+
 #if !defined(CONFIG_USER_ONLY)
 static void x86_set_hyperv(Object *obj, Error **errp)
 {
     X86CPU *cpu = X86_CPU(obj);
 
     cpu->env.cpuid_hv_level = CPUID_HV_LEVEL_HYPERV;
+    x86_cpuid_set_hv_vendor(obj, CPUID_HV_VENDOR_HYPERV, errp);
 }
 
 static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
@@ -2121,6 +2162,9 @@ static void x86_cpu_initfn(Object *obj)
     object_property_add(obj, "hypervisor-level", "int",
                         x86_cpuid_get_hv_level,
                         x86_cpuid_set_hv_level, NULL, NULL, NULL);
+    object_property_add_str(obj, "hypervisor-vendor",
+                            x86_cpuid_get_hv_vendor,
+                            x86_cpuid_set_hv_vendor, NULL);
 #if !defined(CONFIG_USER_ONLY)
     object_property_add(obj, "hv_spinlocks", "int",
                         x86_get_hv_spinlocks,
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index e13a44a..91ddf76 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -488,6 +488,8 @@
 
 #define CPUID_VENDOR_VIA   "CentaurHauls"
 
+#define CPUID_HV_VENDOR_HYPERV "Microsoft Hv"
+
 #define CPUID_HV_LEVEL_HYPERV  0x40000005
 
 #define CPUID_MWAIT_IBE     (1 << 1) /* Interrupts can exit capability */
-- 
1.7.1

[Qemu-devel] [PATCH v4 10/17] target-i386: Use Hypervisor vendor in -machine pc, accel=kvm.

[Don Slutz]

Also known as Paravirtualization vendor.

This change is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/kvm.c |   15 ++++++++++-----
 1 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index bf27793..dde9214 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -389,16 +389,21 @@ int kvm_arch_init_vcpu(CPUX86State *env)
     c = &cpuid_data.entries[cpuid_i++];
     memset(c, 0, sizeof(*c));
     c->function = KVM_CPUID_SIGNATURE;
-    if (env->cpuid_hv_level == 0) {
+    if (env->cpuid_hv_level == 0 &&
+        env->cpuid_hv_vendor1 == 0 &&
+        env->cpuid_hv_vendor2 == 0 &&
+        env->cpuid_hv_vendor3 == 0) {
         memcpy(signature, "KVMKVMKVM\0\0\0", 12);
         c->eax = 0;
+        c->ebx = signature[0];
+        c->ecx = signature[1];
+        c->edx = signature[2];
     } else {
-        memcpy(signature, "Microsoft Hv", 12);
         c->eax = env->cpuid_hv_level;
+        c->ebx = env->cpuid_hv_vendor1;
+        c->ecx = env->cpuid_hv_vendor2;
+        c->edx = env->cpuid_hv_vendor3;
     }
-    c->ebx = signature[0];
-    c->ecx = signature[1];
-    c->edx = signature[2];
 
     c = &cpuid_data.entries[cpuid_i++];
     memset(c, 0, sizeof(*c));
-- 
1.7.1

[Qemu-devel] [PATCH v4 11/17] target-i386: Use Hypervisor vendor in -machine pc, accel=tcg.

[Don Slutz]

Also known as Paravirtualization vendor.

This change is based on:

Microsoft Hypervisor CPUID Leaves:
  http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx

Linux kernel change starts with:
  http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html
Also:
  http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html
This is where the 0 is the same as 0x40000001 is defined.

VMware documention on CPUIDs (Mechanisms to determine if software is
running in a VMware virtual machine):
  http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1009458

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   20 ++++++++++++++------
 target-i386/cpu.h |    2 ++
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d8f7e22..5cf7146 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1693,10 +1693,18 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             }
         }
     } else if (index & 0x40000000) {
-        if (env->cpuid_hv_level > 0) {
+        if (env->cpuid_hv_level != 0 ||
+            env->cpuid_hv_vendor1 != 0 ||
+            env->cpuid_hv_vendor2 != 0 ||
+            env->cpuid_hv_vendor3 != 0) {
+            uint32_t real_level = env->cpuid_hv_level;
+
+            /* Handle KVM's old level. */
+            if (real_level == 0)
+                real_level = CPUID_HV_LEVEL_KVM;
             /* Handle Hypervisor CPUIDs */
-            if (index > env->cpuid_hv_level) {
-                index = env->cpuid_hv_level;
+            if (index > real_level) {
+                index = real_level;
             }
         } else {
             if (index > env->cpuid_level)
@@ -1842,9 +1850,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         break;
     case 0x40000000:
         *eax = env->cpuid_hv_level;
-        *ebx = 0;
-        *ecx = 0;
-        *edx = 0;
+        *ebx = env->cpuid_hv_vendor1;
+        *ecx = env->cpuid_hv_vendor2;
+        *edx = env->cpuid_hv_vendor3;
         break;
     case 0x40000001:
         *eax = env->cpuid_kvm_features;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 91ddf76..e3e176b 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -492,6 +492,8 @@
 
 #define CPUID_HV_LEVEL_HYPERV  0x40000005
 
+#define CPUID_HV_LEVEL_KVM  0x40000001
+
 #define CPUID_MWAIT_IBE     (1 << 1) /* Interrupts can exit capability */
 #define CPUID_MWAIT_EMX     (1 << 0) /* enumeration supported */
 
-- 
1.7.1

[Qemu-devel] [PATCH v4 12/17] target-i386: Add some known names to Hypervisor vendor.

[Don Slutz]

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   44 +++++++++++++++++++++++++++++++++++++++++++-
 target-i386/cpu.h |   14 ++++++++++++++
 2 files changed, 57 insertions(+), 1 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5cf7146..904b08f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1206,6 +1206,23 @@ static char *x86_cpuid_get_hv_vendor(Object *obj, Error **errp)
     }
     value[CPUID_VENDOR_SZ] = '\0';
 
+    /* Convert known names */
+    if (!strcmp(value, CPUID_HV_VENDOR_HYPERV) &&
+               env->cpuid_hv_level == CPUID_HV_LEVEL_HYPERV) {
+        pstrcpy(value, sizeof(value), "hyperv");
+    } else if (!strcmp(value, CPUID_HV_VENDOR_VMWARE)) {
+        if (env->cpuid_hv_level == CPUID_HV_LEVEL_VMARE_4) {
+            pstrcpy(value, sizeof(value), "vmware4");
+        } else if (env->cpuid_hv_level == CPUID_HV_LEVEL_VMARE_3) {
+            pstrcpy(value, sizeof(value), "vmware3");
+        }
+    } else if (!strcmp(value, CPUID_HV_VENDOR_XEN) &&
+               env->cpuid_hv_level == CPUID_HV_LEVEL_XEN) {
+        pstrcpy(value, sizeof(value), "xen");
+    } else if (!strcmp(value, CPUID_HV_VENDOR_KVM) &&
+               env->cpuid_hv_level == 0) {
+        pstrcpy(value, sizeof(value), "kvm");
+    }
     return value;
 }
 
@@ -1219,7 +1236,32 @@ static void x86_cpuid_set_hv_vendor(Object *obj, const char *value,
 
     memset(adj_value, 0, sizeof(adj_value));
 
-    pstrcpy(adj_value, sizeof(adj_value), value);
+    /* Convert known names */
+    if (!strcmp(value, "hyperv")) {
+        if (env->cpuid_hv_level == 0) {
+            env->cpuid_hv_level = CPUID_HV_LEVEL_HYPERV;
+        }
+        pstrcpy(adj_value, sizeof(adj_value), CPUID_HV_VENDOR_HYPERV);
+    } else if (!strcmp(value, "vmware") || !strcmp(value, "vmware4")) {
+        if (env->cpuid_hv_level == 0) {
+            env->cpuid_hv_level = CPUID_HV_LEVEL_VMARE_4;
+        }
+        pstrcpy(adj_value, sizeof(adj_value), CPUID_HV_VENDOR_VMWARE);
+    } else if (!strcmp(value, "vmware3")) {
+        if (env->cpuid_hv_level == 0) {
+            env->cpuid_hv_level = CPUID_HV_LEVEL_VMARE_3;
+        }
+        pstrcpy(adj_value, sizeof(adj_value), CPUID_HV_VENDOR_VMWARE);
+    } else if (!strcmp(value, "xen")) {
+        if (env->cpuid_hv_level == 0) {
+            env->cpuid_hv_level = CPUID_HV_LEVEL_XEN;
+        }
+        pstrcpy(adj_value, sizeof(adj_value), CPUID_HV_VENDOR_XEN);
+    } else if (!strcmp(value, "kvm")) {
+        pstrcpy(adj_value, sizeof(adj_value), CPUID_HV_VENDOR_KVM);
+    } else {
+        pstrcpy(adj_value, sizeof(adj_value), value);
+    }
 
     env->cpuid_hv_vendor1 = 0;
     env->cpuid_hv_vendor2 = 0;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index e3e176b..6dafaeb 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -490,10 +490,24 @@
 
 #define CPUID_HV_VENDOR_HYPERV "Microsoft Hv"
 
+#define CPUID_HV_VENDOR_VMWARE_1 0x61774d56 /* "VMwa" */
+#define CPUID_HV_VENDOR_VMWARE_2 0x4d566572 /* "reVM" */
+#define CPUID_HV_VENDOR_VMWARE_3 0x65726177 /* "ware" */
+#define CPUID_HV_VENDOR_VMWARE "VMwareVMware"
+
+#define CPUID_HV_VENDOR_XEN "XenVMMXenVMM"
+
+#define CPUID_HV_VENDOR_KVM "KVMKVMKVM"
+
 #define CPUID_HV_LEVEL_HYPERV  0x40000005
 
 #define CPUID_HV_LEVEL_KVM  0x40000001
 
+#define CPUID_HV_LEVEL_XEN  0x40000002
+
+#define CPUID_HV_LEVEL_VMARE_3 0x40000002
+#define CPUID_HV_LEVEL_VMARE_4 0x40000010
+
 #define CPUID_MWAIT_IBE     (1 << 1) /* Interrupts can exit capability */
 #define CPUID_MWAIT_EMX     (1 << 0) /* enumeration supported */
 
-- 
1.7.1

[Qemu-devel] [PATCH v4 13/17] target-i386: Add optional Hypervisor leaf extra.

[Don Slutz]

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 6dafaeb..e158c54 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -807,6 +807,10 @@ typedef struct CPUX86State {
     uint32_t cpuid_hv_vendor1;
     uint32_t cpuid_hv_vendor2;
     uint32_t cpuid_hv_vendor3;
+    /* VMware extra data */
+    uint32_t cpuid_hv_extra;
+    uint32_t cpuid_hv_extra_a;
+    uint32_t cpuid_hv_extra_b;
 
     /* MTRRs */
     uint64_t mtrr_fixed[11];
-- 
1.7.1

[Qemu-devel] [PATCH v4 14/17] target-i386: Add cpu object access routines for Hypervisor leaf extra.

[Don Slutz]

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   66 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 66 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 904b08f..7e9c43b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1273,6 +1273,63 @@ static void x86_cpuid_set_hv_vendor(Object *obj, const char *value,
     }
 }
 
+static void x86_cpuid_get_hv_extra(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    visit_type_uint32(v, &cpu->env.cpuid_hv_extra, name, errp);
+}
+
+static void x86_cpuid_set_hv_extra(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+    uint32_t value;
+
+    visit_type_uint32(v, &value, name, errp);
+    if (error_is_set(errp)) {
+        return;
+    }
+
+    if ((value != 0) && (value < 0x40000000)) {
+        value += 0x40000000;
+    }
+    cpu->env.cpuid_hv_extra = value;
+}
+
+static void x86_cpuid_get_hv_extra_a(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    visit_type_uint32(v, &cpu->env.cpuid_hv_extra_a, name, errp);
+}
+
+static void x86_cpuid_set_hv_extra_a(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    visit_type_uint32(v, &cpu->env.cpuid_hv_extra_a, name, errp);
+}
+
+static void x86_cpuid_get_hv_extra_b(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    visit_type_uint32(v, &cpu->env.cpuid_hv_extra_b, name, errp);
+}
+
+static void x86_cpuid_set_hv_extra_b(Object *obj, Visitor *v, void *opaque,
+                                const char *name, Error **errp)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    visit_type_uint32(v, &cpu->env.cpuid_hv_extra_b, name, errp);
+}
+
 #if !defined(CONFIG_USER_ONLY)
 static void x86_set_hyperv(Object *obj, Error **errp)
 {
@@ -2215,6 +2272,15 @@ static void x86_cpu_initfn(Object *obj)
     object_property_add_str(obj, "hypervisor-vendor",
                             x86_cpuid_get_hv_vendor,
                             x86_cpuid_set_hv_vendor, NULL);
+    object_property_add(obj, "hypervisor-extra", "int",
+                        x86_cpuid_get_hv_extra,
+                        x86_cpuid_set_hv_extra, NULL, NULL, NULL);
+    object_property_add(obj, "hypervisor-extra-a", "int",
+                        x86_cpuid_get_hv_extra_a,
+                        x86_cpuid_set_hv_extra_a, NULL, NULL, NULL);
+    object_property_add(obj, "hypervisor-extra-b", "int",
+                        x86_cpuid_get_hv_extra_b,
+                        x86_cpuid_set_hv_extra_b, NULL, NULL, NULL);
 #if !defined(CONFIG_USER_ONLY)
     object_property_add(obj, "hv_spinlocks", "int",
                         x86_get_hv_spinlocks,
-- 
1.7.1

[Qemu-devel] [PATCH v4 15/17] target-i386: Add setting of Hypervisor leaf extra for known vmare4.

[Don Slutz]

This was taken from:
  http://article.gmane.org/gmane.comp.emulators.kvm.devel/22643

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 7e9c43b..4594693 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1135,6 +1135,36 @@ static void x86_cpuid_set_model_id(Object *obj, const char *model_id,
     }
 }
 
+static void x86_cpuid_set_vmware_extra(Object *obj)
+{
+    X86CPU *cpu = X86_CPU(obj);
+
+    if ((cpu->env.tsc_khz != 0) &&
+        (cpu->env.cpuid_hv_level == CPUID_HV_LEVEL_VMARE_4) &&
+        (cpu->env.cpuid_hv_vendor1 == CPUID_HV_VENDOR_VMWARE_1) &&
+        (cpu->env.cpuid_hv_vendor2 == CPUID_HV_VENDOR_VMWARE_2) &&
+        (cpu->env.cpuid_hv_vendor3 == CPUID_HV_VENDOR_VMWARE_3)) {
+        const uint32_t apic_khz = 1000000L;
+
+        /*
+         * From article.gmane.org/gmane.comp.emulators.kvm.devel/22643
+         *
+         *    Leaf 0x40000010, Timing Information.
+         *
+         *    VMware has defined the first generic leaf to provide timing
+         *    information.  This leaf returns the current TSC frequency and
+         *    current Bus frequency in kHz.
+         *
+         *    # EAX: (Virtual) TSC frequency in kHz.
+         *    # EBX: (Virtual) Bus (local apic timer) frequency in kHz.
+         *    # ECX, EDX: RESERVED (Per above, reserved fields are set to zero).
+         */
+        cpu->env.cpuid_hv_extra = 0x40000010;
+        cpu->env.cpuid_hv_extra_a = (uint32_t)cpu->env.tsc_khz;
+        cpu->env.cpuid_hv_extra_b = apic_khz;
+    }
+}
+
 static void x86_cpuid_get_tsc_freq(Object *obj, Visitor *v, void *opaque,
                                    const char *name, Error **errp)
 {
@@ -1164,6 +1194,7 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque,
     }
 
     cpu->env.tsc_khz = value / 1000;
+    x86_cpuid_set_vmware_extra(obj);
 }
 
 static void x86_cpuid_get_hv_level(Object *obj, Visitor *v, void *opaque,
@@ -1271,6 +1302,7 @@ static void x86_cpuid_set_hv_vendor(Object *obj, const char *value,
         env->cpuid_hv_vendor2 |= ((uint8_t)adj_value[i + 4]) << (8 * i);
         env->cpuid_hv_vendor3 |= ((uint8_t)adj_value[i + 8]) << (8 * i);
     }
+    x86_cpuid_set_vmware_extra(obj);
 }
 
 static void x86_cpuid_get_hv_extra(Object *obj, Visitor *v, void *opaque,
-- 
1.7.1

[Qemu-devel] [PATCH v4 16/17] target-i386: Use Hypervisor leaf extra in -machine pc, accel=kvm.

[Don Slutz]

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/kvm.c |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index dde9214..bd7753f 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -457,6 +457,25 @@ int kvm_arch_init_vcpu(CPUX86State *env)
         c->ebx = signature[0];
         c->ecx = signature[1];
         c->edx = signature[2];
+    } else if (env->cpuid_hv_level > 0) {
+        for (i = KVM_CPUID_FEATURES + 1; i <= env->cpuid_hv_level; i++) {
+            c = &cpuid_data.entries[cpuid_i++];
+            memset(c, 0, sizeof(*c));
+            c->function = i;
+            if (i == env->cpuid_hv_extra) {
+                c->eax = env->cpuid_hv_extra_a;
+                c->ebx = env->cpuid_hv_extra_b;
+            }
+        }
+
+        c = &cpuid_data.entries[cpuid_i++];
+        memset(c, 0, sizeof(*c));
+        c->function = KVM_CPUID_SIGNATURE_NEXT;
+        memcpy(signature, "KVMKVMKVM\0\0\0", 12);
+        c->eax = 0;
+        c->ebx = signature[0];
+        c->ecx = signature[1];
+        c->edx = signature[2];
     }
 
     has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF);
-- 
1.7.1

[Qemu-devel] [PATCH v4 17/17] target-i386: Use Hypervisor leaf extra in -machine pc, accel=tcg.

[Don Slutz]

Signed-off-by: Don Slutz <Don@CloudSwitch.com>
---
 target-i386/cpu.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 4594693..72a8442 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1991,6 +1991,17 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         *ecx = 0;
         *edx = 0;
         break;
+    case 0x40000002 ... 0x400000FF:
+        if (index == env->cpuid_hv_extra) {
+            *eax = env->cpuid_hv_extra_a;
+            *ebx = env->cpuid_hv_extra_b;
+        } else {
+            *eax = 0;
+            *ebx = 0;
+        }
+        *ecx = 0;
+        *edx = 0;
+        break;
     case 0x80000000:
         *eax = env->cpuid_xlevel;
         *ebx = env->cpuid_vendor1;
-- 
1.7.1

Re: [Qemu-devel] [PATCH v4 02/17] target-i386: Add missing kvm bits.

[Igor Mammedov]

On Thu, 20 Sep 2012 16:03:17 -0400
Don Slutz <Don@cloudswitch.com> wrote:

> Fix duplicate name (kvmclock => kvm_clock2) also.
> 
> Signed-off-by: Don Slutz <Don@CloudSwitch.com>
> ---
>  target-i386/cpu.c |   12 ++++++++----
>  1 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 0313cf5..5f9866a 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -87,10 +87,14 @@ static const char *ext3_feature_name[] = {
>  };
>  
>  static const char *kvm_feature_name[] = {
> -    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, "kvm_pv_eoi", NULL,
> -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> +    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvm_clock2",
before patch if "kvmclock" is specified it would set 0 and 3 bits,
after patch only bit 0 is set.
Is it correct/expected behavior? if yes, please add rationale into patch
description.
 
> +    "kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", NULL,
> +    NULL, NULL, NULL, NULL,
> +    NULL, NULL, NULL, NULL,
> +    NULL, NULL, NULL, NULL,
> +    NULL, NULL, NULL, NULL,
> +    "kvm_clock_stable", NULL, NULL, NULL,
> +    NULL, NULL, NULL, NULL,
>  };
>  
>  static const char *svm_feature_name[] = {
> -- 
> 1.7.1
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [PATCH v4 02/17] target-i386: Add missing kvm bits.

[Eduardo Habkost]

On Fri, Sep 21, 2012 at 10:39:52AM +0200, Igor Mammedov wrote:
> On Thu, 20 Sep 2012 16:03:17 -0400
> Don Slutz <Don@cloudswitch.com> wrote:
> 
> > Fix duplicate name (kvmclock => kvm_clock2) also.
> > 
> > Signed-off-by: Don Slutz <Don@CloudSwitch.com>
> > ---
> >  target-i386/cpu.c |   12 ++++++++----
> >  1 files changed, 8 insertions(+), 4 deletions(-)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 0313cf5..5f9866a 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -87,10 +87,14 @@ static const char *ext3_feature_name[] = {
> >  };
> >  
> >  static const char *kvm_feature_name[] = {
> > -    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, "kvm_pv_eoi", NULL,
> > -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> > -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> > -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> > +    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvm_clock2",
> before patch if "kvmclock" is specified it would set 0 and 3 bits,
> after patch only bit 0 is set.
> Is it correct/expected behavior? if yes, please add rationale into patch
> description.

The problem here seems to be:
- It would be interesting to make "kvmclock=true" enough to enable the
  optimal behavior, instead of requiring users to use "kvm_clock2=true"
  explicitly
- We need to allow older machine-types to be backwards compatible (not
  enabling the second bit by default), so we need a separate property
  to control the second bit.

I think this is best modelled this way:

- Having two separate properties: kvmclock and kvmclock2 (or kvm_clock2)
- Older machine-types would have kvmclock2 default to false. Newer
  machine-types would kvmclock2 default to true.
- kvmclock=false would disable both bits

Then:

 - kvmclock=false would not set any bit (it would be surprising to have
   kvmclock=false but still have kvmclock enabled)
 - kvmclock=true would keep compatible behavior on older machine-types,
   (only the first bit set), but would get optimal behavior on newer
   machine-types (both bits set)
 - kvmclock=true,kvmclock2=true would set both bits
 - kvmclock=true,kvmclock2=false would set only the first bit

It wouldn't be a direct mapping between properties and CPUID bits, but
that's exactly the point. In this case, exposing individual CPUID bits
directly is a too low-level interface.


>  
> > +    "kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", NULL,
> > +    NULL, NULL, NULL, NULL,
> > +    NULL, NULL, NULL, NULL,
> > +    NULL, NULL, NULL, NULL,
> > +    NULL, NULL, NULL, NULL,
> > +    "kvm_clock_stable", NULL, NULL, NULL,
> > +    NULL, NULL, NULL, NULL,
> >  };
> >  
> >  static const char *svm_feature_name[] = {
> > -- 
> > 1.7.1
> > 
> 
> 
> -- 
> Regards,
>   Igor

-- 
Eduardo

Re: [Qemu-devel] [PATCH v4 02/17] target-i386: Add missing kvm bits.

[Don Slutz]

On 09/21/12 08:36, Eduardo Habkost wrote:
> On Fri, Sep 21, 2012 at 10:39:52AM +0200, Igor Mammedov wrote:
>> On Thu, 20 Sep 2012 16:03:17 -0400
>> Don Slutz <Don@cloudswitch.com> wrote:
>>
>>> Fix duplicate name (kvmclock => kvm_clock2) also.
>>>
>>> Signed-off-by: Don Slutz <Don@CloudSwitch.com>
>>> ---
>>>   target-i386/cpu.c |   12 ++++++++----
>>>   1 files changed, 8 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
>>> index 0313cf5..5f9866a 100644
>>> --- a/target-i386/cpu.c
>>> +++ b/target-i386/cpu.c
>>> @@ -87,10 +87,14 @@ static const char *ext3_feature_name[] = {
>>>   };
>>>   
>>>   static const char *kvm_feature_name[] = {
>>> -    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, "kvm_pv_eoi", NULL,
>>> -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
>>> -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
>>> -    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
>>> +    "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvm_clock2",
>> before patch if "kvmclock" is specified it would set 0 and 3 bits,
>> after patch only bit 0 is set.
>> Is it correct/expected behavior? if yes, please add rationale into patch
>> description.
This is not what I had intended.
> The problem here seems to be:
> - It would be interesting to make "kvmclock=true" enough to enable the
>    optimal behavior, instead of requiring users to use "kvm_clock2=true"
>    explicitly
> - We need to allow older machine-types to be backwards compatible (not
>    enabling the second bit by default), so we need a separate property
>    to control the second bit.
>
> I think this is best modelled this way:
>
> - Having two separate properties: kvmclock and kvmclock2 (or kvm_clock2)
> - Older machine-types would have kvmclock2 default to false. Newer
>    machine-types would kvmclock2 default to true.
> - kvmclock=false would disable both bits
>
> Then:
>
>   - kvmclock=false would not set any bit (it would be surprising to have
>     kvmclock=false but still have kvmclock enabled)
>   - kvmclock=true would keep compatible behavior on older machine-types,
>     (only the first bit set), but would get optimal behavior on newer
>     machine-types (both bits set)
>   - kvmclock=true,kvmclock2=true would set both bits
>   - kvmclock=true,kvmclock2=false would set only the first bit
>
> It wouldn't be a direct mapping between properties and CPUID bits, but
> that's exactly the point. In this case, exposing individual CPUID bits
> directly is a too low-level interface.
>
This does look much better.  For the sake of simple changes, this patch 
will be changed so that -kvmclock (kvmclock=false) will continue to 
clear both bits.  I will look into the right way to fit this into the 
newer cpu model.
>>   
>>> +    "kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", NULL,
>>> +    NULL, NULL, NULL, NULL,
>>> +    NULL, NULL, NULL, NULL,
>>> +    NULL, NULL, NULL, NULL,
>>> +    NULL, NULL, NULL, NULL,
>>> +    "kvm_clock_stable", NULL, NULL, NULL,
>>> +    NULL, NULL, NULL, NULL,
>>>   };
>>>   
>>>   static const char *svm_feature_name[] = {
>>> -- 
>>> 1.7.1
>>>
>>
>> -- 
>> Regards,
>>    Igor
   -Don Slutz