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From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <anthony@codemonkey.ws>
Cc: qemu-devel@nongnu.org, Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 1/4] pl190: fix read of VECTADDR
Date: Wed, 26 Sep 2012 17:13:32 +0100	[thread overview]
Message-ID: <1348676015-16547-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1348676015-16547-1-git-send-email-peter.maydell@linaro.org>

From: Brendan Fennell <bfennell@skynet.ie>

Reading VECTADDR was causing us to set the current priority to
the wrong value, the most obvious effect of which was that we
would return the vector for the wrong interrupt as the result
of the read.

Signed-off-by: Brendan Fennell <bfennell@skynet.ie>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/pl190.c |   18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/hw/pl190.c b/hw/pl190.c
index cb50afb..7332f4d 100644
--- a/hw/pl190.c
+++ b/hw/pl190.c
@@ -117,12 +117,18 @@ static uint64_t pl190_read(void *opaque, target_phys_addr_t offset,
         return s->protected;
     case 12: /* VECTADDR */
         /* Read vector address at the start of an ISR.  Increases the
-           current priority level to that of the current interrupt.  */
-        for (i = 0; i < s->priority; i++)
-          {
-            if ((s->level | s->soft_level) & s->prio_mask[i])
-              break;
-          }
+         * current priority level to that of the current interrupt.
+         *
+         * Since an enabled interrupt X at priority P causes prio_mask[Y]
+         * to have bit X set for all Y > P, this loop will stop with
+         * i == the priority of the highest priority set interrupt.
+         */
+        for (i = 0; i < s->priority; i++) {
+            if ((s->level | s->soft_level) & s->prio_mask[i + 1]) {
+                break;
+            }
+        }
+
         /* Reading this value with no pending interrupts is undefined.
            We return the default address.  */
         if (i == PL190_NUM_PRIO)
-- 
1.7.9.5

  reply	other threads:[~2012-09-26 16:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-26 16:13 [Qemu-devel] [PULL 0/4] arm-devs queue Peter Maydell
2012-09-26 16:13 ` Peter Maydell [this message]
2012-09-26 16:13 ` [Qemu-devel] [PATCH 2/4] hw/armv7m_nvic: Correctly register GIC region when setting up NVIC Peter Maydell
2012-09-26 16:13 ` [Qemu-devel] [PATCH 3/4] Versatile Express: Fix NOR flash 0 address and remove flash alias Peter Maydell
2012-09-26 16:13 ` [Qemu-devel] [PATCH 4/4] Versatile Express: Add modelling of NOR flash Peter Maydell
2012-09-27 19:50 ` [Qemu-devel] [PULL 0/4] arm-devs queue Aurelien Jarno

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