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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org, Aurelien Jarno <aurelien@aurel32.net>,
	Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH 0/2] tcg/arm: Implement movcond_i32
Date: Wed, 26 Sep 2012 19:48:53 +0100	[thread overview]
Message-ID: <1348685335-16770-1-git-send-email-peter.maydell@linaro.org> (raw)

These patches implement movcond_i32 for the ARM TCG backend; we
emit "mov dst, v2; cmp c1, c2; movcc dst, v1". We could have
done this with a pair of conditional movs, but (a) this is not
actually any shorter (b) it means we don't get the common TCG
code doing the work of avoiding "mov reg to itself" (c) conditional
moves aren't quite as free as they used to be on the ARM7.

(Tested using Aurelien's movcond-shift patches on the ARM frontend
as something that will generate enough movconds.)

Peter Maydell (2):
  tcg/arm: Factor out code to emit immediate or reg-reg op
  tcg/arm: Implement movcond_i32

 tcg/arm/tcg-target.c |   56 +++++++++++++++++++++++++++-----------------------
 tcg/arm/tcg-target.h |    2 +-
 2 files changed, 31 insertions(+), 27 deletions(-)

-- 
1.7.9.5

             reply	other threads:[~2012-09-26 18:56 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-26 18:48 Peter Maydell [this message]
2012-09-26 18:48 ` [Qemu-devel] [PATCH 1/2] tcg/arm: Factor out code to emit immediate or reg-reg op Peter Maydell
2012-09-26 19:01   ` Richard Henderson
2012-09-26 19:46     ` Peter Maydell
2012-09-27 13:01       ` Peter Maydell
2012-09-27 19:52   ` Aurelien Jarno
2012-09-26 18:48 ` [Qemu-devel] [PATCH 2/2] tcg/arm: Implement movcond_i32 Peter Maydell
2012-09-27  6:33   ` Paolo Bonzini
2012-09-27 14:32     ` Richard Henderson
2012-09-27 19:53   ` Aurelien Jarno
2012-10-12 17:07 ` [Qemu-devel] [PATCH 0/2] " Peter Maydell
2012-10-16 23:24 ` Aurelien Jarno

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