From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: [Qemu-devel] [PATCH 06/12] tcg-sparc: Fix add2/sub2
Date: Wed, 26 Sep 2012 18:55:36 -0700 [thread overview]
Message-ID: <1348710942-3040-7-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1348710942-3040-1-git-send-email-rth@twiddle.net>
We must care not to clobber the high parts before we consume them.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/sparc/tcg-target.c | 30 ++++++++++++++++++++++--------
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index c3e15b9..3154992 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -704,6 +704,22 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret,
break;
}
}
+
+static void tcg_out_addsub2(TCGContext *s, TCGArg rl, TCGArg rh,
+ TCGArg al, TCGArg ah, TCGArg bl, int blconst,
+ TCGArg bh, int bhconst, int opl, int oph)
+{
+ TCGArg tmp = TCG_REG_T1;
+
+ /* Note that the low parts are fully consumed before tmp is set. */
+ if (rl != ah && (bhconst || rl != bh)) {
+ tmp = rl;
+ }
+
+ tcg_out_arithc(s, tmp, al, bl, blconst, opl);
+ tcg_out_arithc(s, rh, ah, bh, bhconst, oph);
+ tcg_out_mov(s, TCG_TYPE_I32, rl, tmp);
+}
#endif
/* Generate global QEMU prologue and epilogue code */
@@ -1244,16 +1260,14 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
args[4], const_args[4]);
break;
case INDEX_op_add2_i32:
- tcg_out_arithc(s, args[0], args[2], args[4], const_args[4],
- ARITH_ADDCC);
- tcg_out_arithc(s, args[1], args[3], args[5], const_args[5],
- ARITH_ADDX);
+ tcg_out_addsub2(s, args[0], args[1], args[2], args[3],
+ args[4], const_args[4], args[5], const_args[5],
+ ARITH_ADDCC, ARITH_ADDX);
break;
case INDEX_op_sub2_i32:
- tcg_out_arithc(s, args[0], args[2], args[4], const_args[4],
- ARITH_SUBCC);
- tcg_out_arithc(s, args[1], args[3], args[5], const_args[5],
- ARITH_SUBX);
+ tcg_out_addsub2(s, args[0], args[1], args[2], args[3],
+ args[4], const_args[4], args[5], const_args[5],
+ ARITH_SUBCC, ARITH_SUBX);
break;
case INDEX_op_mulu2_i32:
tcg_out_arithc(s, args[0], args[2], args[3], const_args[3],
--
1.7.11.4
next prev parent reply other threads:[~2012-09-27 1:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-27 1:55 [Qemu-devel] [PATCH 00/12] tcg-sparc fixes and improvements Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 01/12] tcg-sparc: Fix brcond2 Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 02/12] tcg-sparc: Implement movcond Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 03/12] tcg-sparc: Fix setcond2 Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 04/12] tcg-sparc: Fix qemu_st for 32-bit Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 05/12] tcg-sparc: Fix setcond Richard Henderson
2012-09-27 1:55 ` Richard Henderson [this message]
2012-09-27 1:55 ` [Qemu-devel] [PATCH 07/12] tcg-sparc: Use Z constraint for %g0 Richard Henderson
2012-09-29 11:55 ` Blue Swirl
2012-09-27 1:55 ` [Qemu-devel] [PATCH 08/12] tcg-sparc: Optimize setcond2 equality compare with 0 Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 09/12] tcg-sparc: Drop use of Bicc in favor of BPcc Richard Henderson
2012-09-29 12:07 ` Blue Swirl
2012-09-29 17:21 ` Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 10/12] tcg-sparc: Dump illegal opode contents Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 11/12] tcg-sparc: Emit BPr insns for brcond_i64 Richard Henderson
2012-09-27 1:55 ` [Qemu-devel] [PATCH 12/12] tcg-sparc: Emit MOVR insns for setcond_i64 and movcond_64 Richard Henderson
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