* [Qemu-devel] [PATCH 1/3] vga: add mmio bar to standard vga
2012-09-27 7:47 [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
@ 2012-09-27 7:47 ` Gerd Hoffmann
2012-09-27 7:47 ` [Qemu-devel] [PATCH 2/3] vga: add specs for " Gerd Hoffmann
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Gerd Hoffmann @ 2012-09-27 7:47 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
This patch adds a mmio bar to the qemu standard vga which allows to
access the standard vga registers and bochs dispi interface registers
via mmio.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/pc_piix.c | 4 ++
hw/vga-pci.c | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
hw/vga.c | 6 ++--
hw/vga_int.h | 6 +++
4 files changed, 121 insertions(+), 3 deletions(-)
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index fd5898f..2d136e0 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -371,6 +371,10 @@ static QEMUMachine pc_machine_v1_3 = {
.driver = "ivshmem",\
.property = "use64",\
.value = "0",\
+ },{\
+ .driver = "VGA",\
+ .property = "mmio",\
+ .value = "off",\
}
static QEMUMachine pc_machine_v1_2 = {
diff --git a/hw/vga-pci.c b/hw/vga-pci.c
index 9abbada..df1a1f1 100644
--- a/hw/vga-pci.c
+++ b/hw/vga-pci.c
@@ -30,9 +30,23 @@
#include "qemu-timer.h"
#include "loader.h"
+#define PCI_VGA_IOPORT_OFFSET 0x400
+#define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0)
+#define PCI_VGA_BOCHS_OFFSET 0x500
+#define PCI_VGA_BOCHS_SIZE (0x0b * 2)
+#define PCI_VGA_MMIO_SIZE 0x1000
+
+enum vga_pci_flags {
+ PCI_VGA_FLAG_ENABLE_MMIO = 1,
+};
+
typedef struct PCIVGAState {
PCIDevice dev;
VGACommonState vga;
+ uint32_t flags;
+ MemoryRegion mmio;
+ MemoryRegion ioport;
+ MemoryRegion bochs;
} PCIVGAState;
static const VMStateDescription vmstate_vga_pci = {
@@ -47,6 +61,84 @@ static const VMStateDescription vmstate_vga_pci = {
}
};
+static uint64_t pci_vga_ioport_read(void *ptr, target_phys_addr_t addr,
+ unsigned size)
+{
+ PCIVGAState *d = ptr;
+ uint64_t ret = 0;
+
+ switch (size) {
+ case 1:
+ ret = vga_ioport_read(&d->vga, addr);
+ break;
+ case 2:
+ ret = vga_ioport_read(&d->vga, addr);
+ ret |= vga_ioport_read(&d->vga, addr+1) << 8;
+ break;
+ }
+ return ret;
+}
+
+static void pci_vga_ioport_write(void *ptr, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
+{
+ PCIVGAState *d = ptr;
+ switch (size) {
+ case 1:
+ vga_ioport_write(&d->vga, addr, val);
+ break;
+ case 2:
+ /*
+ * Update bytes in little endian order. Allows to update
+ * indexed registers with a single word write because the
+ * index byte is updated first.
+ */
+ vga_ioport_write(&d->vga, addr, val & 0xff);
+ vga_ioport_write(&d->vga, addr+1, (val >> 8) & 0xff);
+ break;
+ }
+}
+
+static const MemoryRegionOps pci_vga_ioport_ops = {
+ .read = pci_vga_ioport_read,
+ .write = pci_vga_ioport_write,
+ .valid.min_access_size = 1,
+ .valid.max_access_size = 4,
+ .impl.min_access_size = 1,
+ .impl.max_access_size = 2,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static uint64_t pci_vga_bochs_read(void *ptr, target_phys_addr_t addr,
+ unsigned size)
+{
+ PCIVGAState *d = ptr;
+ int index = addr >> 1;
+
+ vbe_ioport_write_index(&d->vga, 0, index);
+ return vbe_ioport_read_data(&d->vga, 0);
+}
+
+static void pci_vga_bochs_write(void *ptr, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
+{
+ PCIVGAState *d = ptr;
+ int index = addr >> 1;
+
+ vbe_ioport_write_index(&d->vga, 0, index);
+ vbe_ioport_write_data(&d->vga, 0, val);
+}
+
+static const MemoryRegionOps pci_vga_bochs_ops = {
+ .read = pci_vga_bochs_read,
+ .write = pci_vga_bochs_write,
+ .valid.min_access_size = 1,
+ .valid.max_access_size = 4,
+ .impl.min_access_size = 2,
+ .impl.max_access_size = 2,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
static int pci_vga_initfn(PCIDevice *dev)
{
PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev);
@@ -62,6 +154,21 @@ static int pci_vga_initfn(PCIDevice *dev)
/* XXX: VGA_RAM_SIZE must be a power of two */
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
+ /* mmio bar for vga register access */
+ if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) {
+ memory_region_init(&d->mmio, "vga.mmio", 4096);
+ memory_region_init_io(&d->ioport, &pci_vga_ioport_ops, d,
+ "vga ioports remapped", PCI_VGA_IOPORT_SIZE);
+ memory_region_init_io(&d->bochs, &pci_vga_bochs_ops, d,
+ "bochs dispi interface", PCI_VGA_BOCHS_SIZE);
+
+ memory_region_add_subregion(&d->mmio, PCI_VGA_IOPORT_OFFSET,
+ &d->ioport);
+ memory_region_add_subregion(&d->mmio, PCI_VGA_BOCHS_OFFSET,
+ &d->bochs);
+ pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
+ }
+
if (!dev->rom_bar) {
/* compatibility with pc-0.13 and older */
vga_init_vbe(s, pci_address_space(dev));
@@ -77,6 +184,7 @@ DeviceState *pci_vga_init(PCIBus *bus)
static Property vga_pci_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16),
+ DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/vga.c b/hw/vga.c
index ec4f0c5..053f89d 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -591,7 +591,7 @@ static uint32_t vbe_ioport_read_index(void *opaque, uint32_t addr)
return val;
}
-static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
+uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
{
VGACommonState *s = opaque;
uint32_t val;
@@ -627,13 +627,13 @@ static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
return val;
}
-static void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val)
+void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val)
{
VGACommonState *s = opaque;
s->vbe_index = val;
}
-static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
+void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
{
VGACommonState *s = opaque;
diff --git a/hw/vga_int.h b/hw/vga_int.h
index 330a32f..5b68490 100644
--- a/hw/vga_int.h
+++ b/hw/vga_int.h
@@ -208,7 +208,13 @@ void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
void ppm_save(const char *filename, struct DisplaySurface *ds, Error **errp);
int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
+
+#ifdef CONFIG_BOCHS_VBE
void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
+uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
+void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
+void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
+#endif
extern const uint8_t sr_mask[8];
extern const uint8_t gr_mask[16];
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [Qemu-devel] [PATCH 2/3] vga: add specs for standard vga
2012-09-27 7:47 [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
2012-09-27 7:47 ` [Qemu-devel] [PATCH 1/3] vga: add mmio bar to standard vga Gerd Hoffmann
@ 2012-09-27 7:47 ` Gerd Hoffmann
2012-09-27 7:47 ` [Qemu-devel] [PATCH 3/3] vga: remove CONFIG_BOCHS_VBE Gerd Hoffmann
2012-10-11 11:43 ` [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
3 siblings, 0 replies; 7+ messages in thread
From: Gerd Hoffmann @ 2012-09-27 7:47 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
docs/specs/standard-vga.txt | 64 +++++++++++++++++++++++++++++++++++++++++++
hw/vga-isa.c | 2 +
hw/vga-pci.c | 2 +
3 files changed, 68 insertions(+), 0 deletions(-)
create mode 100644 docs/specs/standard-vga.txt
diff --git a/docs/specs/standard-vga.txt b/docs/specs/standard-vga.txt
new file mode 100644
index 0000000..1cecccd
--- /dev/null
+++ b/docs/specs/standard-vga.txt
@@ -0,0 +1,64 @@
+
+QEMU Standard VGA
+=================
+
+Exists in two variants, for isa and pci.
+
+command line switches:
+ -vga std [ picks isa for -M isapc, otherwise pci ]
+ -device VGA [ pci variant ]
+ -device isa-vga [ isa variant ]
+
+
+PCI spec
+--------
+
+Applies to the pci variant only for obvious reasons.
+
+PCI ID: 1234:1111
+
+PCI Region 0:
+ Framebuffer memory, 16 MB in size (by default).
+ Size is tunable via vga_mem_mb property.
+
+PCI Region 1:
+ Reserved (so we have the option to make the framebuffer bar 64bit).
+
+PCI Region 2:
+ MMIO bar, 4096 bytes in size (qemu 1.3+)
+
+PCI ROM Region:
+ Holds the vgabios (qemu 0.14+).
+
+
+IO ports used
+-------------
+
+03c0 - 03df : standard vga ports
+01ce : bochs vbe interface index port
+01cf : bochs vbe interface data port
+
+
+Memory regions used
+-------------------
+
+0xe0000000 : Framebuffer memory, isa variant only.
+
+The pci variant used to mirror the framebuffer bar here, qemu 0.14+
+stops doing that (except when in -M pc-$old compat mode).
+
+
+MMIO area spec
+--------------
+
+Likewise applies to the pci variant only for obvious reasons.
+
+0000 - 03ff : reserved, for possible virtio extension.
+0400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1.
+ word access is supported, bytes are written
+ in little endia order (aka index port first),
+ so indexed registers can be updated with a
+ single mmio write (and thus only one vmexit).
+0500 - 0515 : bochs dispi interface registers, mapped flat
+ without index/data ports. Use (index << 1)
+ as offset for (16bit) register access.
diff --git a/hw/vga-isa.c b/hw/vga-isa.c
index d290473..046602b 100644
--- a/hw/vga-isa.c
+++ b/hw/vga-isa.c
@@ -1,6 +1,8 @@
/*
* QEMU ISA VGA Emulator.
*
+ * see docs/specs/standard-vga.txt for virtual hardware specs.
+ *
* Copyright (c) 2003 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
diff --git a/hw/vga-pci.c b/hw/vga-pci.c
index df1a1f1..9b1e3ee 100644
--- a/hw/vga-pci.c
+++ b/hw/vga-pci.c
@@ -1,6 +1,8 @@
/*
* QEMU PCI VGA Emulator.
*
+ * see docs/specs/standard-vga.txt for virtual hardware specs.
+ *
* Copyright (c) 2003 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 3/3] vga: remove CONFIG_BOCHS_VBE
2012-09-27 7:47 [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
2012-09-27 7:47 ` [Qemu-devel] [PATCH 1/3] vga: add mmio bar to standard vga Gerd Hoffmann
2012-09-27 7:47 ` [Qemu-devel] [PATCH 2/3] vga: add specs for " Gerd Hoffmann
@ 2012-09-27 7:47 ` Gerd Hoffmann
2012-10-11 11:43 ` [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
3 siblings, 0 replies; 7+ messages in thread
From: Gerd Hoffmann @ 2012-09-27 7:47 UTC (permalink / raw)
To: qemu-devel; +Cc: Gerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/vga.c | 34 +++++-----------------------------
hw/vga_int.h | 28 +++++++---------------------
2 files changed, 12 insertions(+), 50 deletions(-)
diff --git a/hw/vga.c b/hw/vga.c
index 053f89d..679cabc 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -582,7 +582,6 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
}
}
-#ifdef CONFIG_BOCHS_VBE
static uint32_t vbe_ioport_read_index(void *opaque, uint32_t addr)
{
VGACommonState *s = opaque;
@@ -784,7 +783,6 @@ void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
}
}
}
-#endif
/* called for accesses between 0xa0000 and 0xc0000 */
uint32_t vga_mem_readb(VGACommonState *s, target_phys_addr_t addr)
@@ -1129,14 +1127,12 @@ static void vga_get_offsets(VGACommonState *s,
uint32_t *pline_compare)
{
uint32_t start_addr, line_offset, line_compare;
-#ifdef CONFIG_BOCHS_VBE
+
if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) {
line_offset = s->vbe_line_offset;
start_addr = s->vbe_start_addr;
line_compare = 65535;
- } else
-#endif
- {
+ } else {
/* compute line_offset in bytes */
line_offset = s->cr[VGA_CRTC_OFFSET];
line_offset <<= 3;
@@ -1572,12 +1568,10 @@ static vga_draw_line_func * const vga_draw_line_table[NB_DEPTHS * VGA_DRAW_LINE_
static int vga_get_bpp(VGACommonState *s)
{
int ret;
-#ifdef CONFIG_BOCHS_VBE
+
if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) {
ret = s->vbe_regs[VBE_DISPI_INDEX_BPP];
- } else
-#endif
- {
+ } else {
ret = 0;
}
return ret;
@@ -1587,13 +1581,10 @@ static void vga_get_resolution(VGACommonState *s, int *pwidth, int *pheight)
{
int width, height;
-#ifdef CONFIG_BOCHS_VBE
if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) {
width = s->vbe_regs[VBE_DISPI_INDEX_XRES];
height = s->vbe_regs[VBE_DISPI_INDEX_YRES];
- } else
-#endif
- {
+ } else {
width = (s->cr[VGA_CRTC_H_DISP] + 1) * 8;
height = s->cr[VGA_CRTC_V_DISP_END] |
((s->cr[VGA_CRTC_OVERFLOW] & 0x02) << 7) |
@@ -1948,14 +1939,12 @@ void vga_common_reset(VGACommonState *s)
s->dac_8bit = 0;
memset(s->palette, '\0', sizeof(s->palette));
s->bank_offset = 0;
-#ifdef CONFIG_BOCHS_VBE
s->vbe_index = 0;
memset(s->vbe_regs, '\0', sizeof(s->vbe_regs));
s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID5;
s->vbe_start_addr = 0;
s->vbe_line_offset = 0;
s->vbe_bank_mask = (s->vram_size >> 16) - 1;
-#endif
memset(s->font_offsets, '\0', sizeof(s->font_offsets));
s->graphic_mode = -1; /* force full update */
s->shift_control = 0;
@@ -2229,13 +2218,11 @@ const VMStateDescription vmstate_vga_common = {
VMSTATE_INT32(bank_offset, VGACommonState),
VMSTATE_UINT8_EQUAL(is_vbe_vmstate, VGACommonState),
-#ifdef CONFIG_BOCHS_VBE
VMSTATE_UINT16(vbe_index, VGACommonState),
VMSTATE_UINT16_ARRAY(vbe_regs, VGACommonState, VBE_DISPI_INDEX_NB),
VMSTATE_UINT32(vbe_start_addr, VGACommonState),
VMSTATE_UINT32(vbe_line_offset, VGACommonState),
VMSTATE_UINT32(vbe_bank_mask, VGACommonState),
-#endif
VMSTATE_END_OF_LIST()
}
};
@@ -2275,11 +2262,7 @@ void vga_common_init(VGACommonState *s)
}
s->vram_size_mb = s->vram_size >> 20;
-#ifdef CONFIG_BOCHS_VBE
s->is_vbe_vmstate = 1;
-#else
- s->is_vbe_vmstate = 0;
-#endif
memory_region_init_ram(&s->vram, "vga.vram", s->vram_size);
vmstate_register_ram_global(&s->vram);
xen_register_framebuffer(&s->vram);
@@ -2314,7 +2297,6 @@ static const MemoryRegionPortio vga_portio_list[] = {
PORTIO_END_OF_LIST(),
};
-#ifdef CONFIG_BOCHS_VBE
static const MemoryRegionPortio vbe_portio_list[] = {
{ 0, 1, 2, .read = vbe_ioport_read_index, .write = vbe_ioport_write_index },
# ifdef TARGET_I386
@@ -2324,7 +2306,6 @@ static const MemoryRegionPortio vbe_portio_list[] = {
# endif
PORTIO_END_OF_LIST(),
};
-#endif /* CONFIG_BOCHS_VBE */
/* Used by both ISA and PCI */
MemoryRegion *vga_init_io(VGACommonState *s,
@@ -2334,10 +2315,7 @@ MemoryRegion *vga_init_io(VGACommonState *s,
MemoryRegion *vga_mem;
*vga_ports = vga_portio_list;
- *vbe_ports = NULL;
-#ifdef CONFIG_BOCHS_VBE
*vbe_ports = vbe_portio_list;
-#endif
vga_mem = g_malloc(sizeof(*vga_mem));
memory_region_init_io(vga_mem, &vga_mem_ops, s,
@@ -2379,7 +2357,6 @@ void vga_init(VGACommonState *s, MemoryRegion *address_space,
void vga_init_vbe(VGACommonState *s, MemoryRegion *system_memory)
{
-#ifdef CONFIG_BOCHS_VBE
/* With pc-0.12 and below we map both the PCI BAR and the fixed VBE region,
* so use an alias to avoid double-mapping the same region.
*/
@@ -2390,7 +2367,6 @@ void vga_init_vbe(VGACommonState *s, MemoryRegion *system_memory)
VBE_DISPI_LFB_PHYSICAL_ADDRESS,
&s->vram_vbe);
s->vbe_mapped = 1;
-#endif
}
/********************************************************/
/* vga screen dump */
diff --git a/hw/vga_int.h b/hw/vga_int.h
index 5b68490..144e7d3 100644
--- a/hw/vga_int.h
+++ b/hw/vga_int.h
@@ -29,9 +29,6 @@
#define ST01_V_RETRACE 0x08
#define ST01_DISP_ENABLE 0x01
-/* bochs VBE support */
-#define CONFIG_BOCHS_VBE
-
#define VBE_DISPI_MAX_XRES 16000
#define VBE_DISPI_MAX_YRES 12000
#define VBE_DISPI_MAX_BPP 32
@@ -65,21 +62,6 @@
#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
-#ifdef CONFIG_BOCHS_VBE
-
-#define VGA_STATE_COMMON_BOCHS_VBE \
- uint16_t vbe_index; \
- uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
- uint32_t vbe_start_addr; \
- uint32_t vbe_line_offset; \
- uint32_t vbe_bank_mask; \
- int vbe_mapped;
-#else
-
-#define VGA_STATE_COMMON_BOCHS_VBE
-
-#endif /* !CONFIG_BOCHS_VBE */
-
#define CH_ATTR_SIZE (160 * 100)
#define VGA_MAX_HEIGHT 2048
@@ -140,7 +122,13 @@ typedef struct VGACommonState {
void (*get_resolution)(struct VGACommonState *s,
int *pwidth,
int *pheight);
- VGA_STATE_COMMON_BOCHS_VBE
+ /* bochs vbe state */
+ uint16_t vbe_index;
+ uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
+ uint32_t vbe_start_addr;
+ uint32_t vbe_line_offset;
+ uint32_t vbe_bank_mask;
+ int vbe_mapped;
/* display refresh support */
DisplayState *ds;
uint32_t font_offsets[2];
@@ -209,12 +197,10 @@ void ppm_save(const char *filename, struct DisplaySurface *ds, Error **errp);
int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
-#ifdef CONFIG_BOCHS_VBE
void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
-#endif
extern const uint8_t sr_mask[8];
extern const uint8_t gr_mask[16];
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH 0/3] vga: add mmio bar
2012-09-27 7:47 [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
` (2 preceding siblings ...)
2012-09-27 7:47 ` [Qemu-devel] [PATCH 3/3] vga: remove CONFIG_BOCHS_VBE Gerd Hoffmann
@ 2012-10-11 11:43 ` Gerd Hoffmann
2012-10-13 14:27 ` Blue Swirl
3 siblings, 1 reply; 7+ messages in thread
From: Gerd Hoffmann @ 2012-10-11 11:43 UTC (permalink / raw)
To: Gerd Hoffmann; +Cc: qemu-devel
On 09/27/12 09:47, Gerd Hoffmann wrote:
> Hi,
>
> This patch series adds a mmio bar to the standard vga. It also drops
> a file into docs/specs/ describing the mmio bar and the other properties
> of the qemu standard vga and does a little cleanup by removing
> CONFIG_BOCHS_VBE.
Ping?
cheers,
Gerd
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH 0/3] vga: add mmio bar
2012-10-11 11:43 ` [Qemu-devel] [PATCH 0/3] vga: add mmio bar Gerd Hoffmann
@ 2012-10-13 14:27 ` Blue Swirl
2012-10-15 6:04 ` Gerd Hoffmann
0 siblings, 1 reply; 7+ messages in thread
From: Blue Swirl @ 2012-10-13 14:27 UTC (permalink / raw)
To: Gerd Hoffmann; +Cc: qemu-devel
On Thu, Oct 11, 2012 at 11:43 AM, Gerd Hoffmann <kraxel@redhat.com> wrote:
> On 09/27/12 09:47, Gerd Hoffmann wrote:
>> Hi,
>>
>> This patch series adds a mmio bar to the standard vga. It also drops
>> a file into docs/specs/ describing the mmio bar and the other properties
>> of the qemu standard vga and does a little cleanup by removing
>> CONFIG_BOCHS_VBE.
>
> Ping?
Patches don't apply, please rebase:
Applying: vga: add mmio bar to standard vga
error: patch failed: hw/pc_piix.c:371
error: hw/pc_piix.c: patch does not apply
error: patch failed: hw/vga-pci.c:47
error: hw/vga-pci.c: patch does not apply
Patch failed at 0001 vga: add mmio bar to standard vga
Also checkpatch.pl complains for 1/3:
WARNING: suspect code indent for conditional statements (5, 9)
#212: FILE: hw/vga-pci.c:158:
+ if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) {
+ memory_region_init(&d->mmio, "vga.mmio", 4096);
>
> cheers,
> Gerd
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH 0/3] vga: add mmio bar
2012-10-13 14:27 ` Blue Swirl
@ 2012-10-15 6:04 ` Gerd Hoffmann
0 siblings, 0 replies; 7+ messages in thread
From: Gerd Hoffmann @ 2012-10-15 6:04 UTC (permalink / raw)
To: Blue Swirl; +Cc: qemu-devel
Hi,
> Patches don't apply, please rebase:
> Applying: vga: add mmio bar to standard vga
> error: patch failed: hw/pc_piix.c:371
> error: hw/pc_piix.c: patch does not apply
> error: patch failed: hw/vga-pci.c:47
> error: hw/vga-pci.c: patch does not apply
> Patch failed at 0001 vga: add mmio bar to standard vga
Rebased & resolved.
> Also checkpatch.pl complains for 1/3:
> WARNING: suspect code indent for conditional statements (5, 9)
> #212: FILE: hw/vga-pci.c:158:
> + if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) {
> + memory_region_init(&d->mmio, "vga.mmio", 4096);
Ah, finally figured where this comes from. It's not in this patch, but
the *existing* intention is wrong (5 instead of 4 spaces). Fixed.
v2 is on the way.
cheers,
Gerd
^ permalink raw reply [flat|nested] 7+ messages in thread