From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58667) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THPIv-000649-LY for qemu-devel@nongnu.org; Thu, 27 Sep 2012 21:23:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1THPIu-0006lv-H7 for qemu-devel@nongnu.org; Thu, 27 Sep 2012 21:23:45 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:55708) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1THPIu-0006lq-An for qemu-devel@nongnu.org; Thu, 27 Sep 2012 21:23:44 -0400 Received: by pbbrp2 with SMTP id rp2so4408732pbb.4 for ; Thu, 27 Sep 2012 18:23:43 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 27 Sep 2012 18:23:40 -0700 Message-Id: <1348795420-29005-1-git-send-email-rth@twiddle.net> In-Reply-To: <1348785610-23418-1-git-send-email-rth@twiddle.net> References: <1348785610-23418-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 146/147] target-s390: Optimize get_address List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf Don't load the displacement into a register first, add it second so that tcg_gen_addi_i64 can eliminate zeros. Don't mask the displacement first so that we don't turn small negative numbers into large positive numbers. Signed-off-by: Richard Henderson --- target-s390x/translate.c | 44 ++++++++++++++++++-------------------------- 1 file changed, 18 insertions(+), 26 deletions(-) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index e1888a3..3506493 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -331,37 +331,29 @@ static inline void check_privileged(DisasContext *s) static TCGv_i64 get_address(DisasContext *s, int x2, int b2, int d2) { - TCGv_i64 tmp; + TCGv_i64 tmp = tcg_temp_new_i64(); + bool need_31 = !(s->tb->flags & FLAG_MASK_64); - /* 31-bitify the immediate part; register contents are dealt with below */ - if (!(s->tb->flags & FLAG_MASK_64)) { - d2 &= 0x7fffffffUL; - } + /* Note that d2 is limited to 20 bits, signed. If we crop negative + displacements early we create larger immedate addends. */ - if (x2) { - if (d2) { - tmp = tcg_const_i64(d2); - tcg_gen_add_i64(tmp, tmp, regs[x2]); - } else { - tmp = load_reg(x2); - } - if (b2) { - tcg_gen_add_i64(tmp, tmp, regs[b2]); - } + /* Note that addi optimizes the imm==0 case. */ + if (b2 && x2) { + tcg_gen_add_i64(tmp, regs[b2], regs[x2]); + tcg_gen_addi_i64(tmp, tmp, d2); } else if (b2) { - if (d2) { - tmp = tcg_const_i64(d2); - tcg_gen_add_i64(tmp, tmp, regs[b2]); - } else { - tmp = load_reg(b2); - } + tcg_gen_addi_i64(tmp, regs[b2], d2); + } else if (x2) { + tcg_gen_addi_i64(tmp, regs[x2], d2); } else { - tmp = tcg_const_i64(d2); + if (need_31) { + d2 &= 0x7fffffff; + need_31 = false; + } + tcg_gen_movi_i64(tmp, d2); } - - /* 31-bit mode mask if there are values loaded from registers */ - if (!(s->tb->flags & FLAG_MASK_64) && (x2 || b2)) { - tcg_gen_andi_i64(tmp, tmp, 0x7fffffffUL); + if (need_31) { + tcg_gen_andi_i64(tmp, tmp, 0x7fffffff); } return tmp; -- 1.7.11.4