From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:33959) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJRRa-0007S6-Pz for qemu-devel@nongnu.org; Wed, 03 Oct 2012 12:05:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJRRU-0007x0-O6 for qemu-devel@nongnu.org; Wed, 03 Oct 2012 12:05:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54316) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJRRU-0007wt-ED for qemu-devel@nongnu.org; Wed, 03 Oct 2012 12:05:00 -0400 From: Avi Kivity Date: Wed, 3 Oct 2012 18:04:05 +0200 Message-Id: <1349280245-16341-23-git-send-email-avi@redhat.com> In-Reply-To: <1349280245-16341-1-git-send-email-avi@redhat.com> References: <1349280245-16341-1-git-send-email-avi@redhat.com> Subject: [Qemu-devel] [RFC v1 22/22] pci: honor PCI_COMMAND_MASTER List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, Anthony Liguori , liu ping fan , "Michael S. Tsirkin" , Paolo Bonzini , Blue Swirl Currently we ignore PCI_COMMAND_MASTER completely: DMA succeeds even when the bit is clear. Honor PCI_COMMAND_MASTER by inserting a memory region into the device's bus master address space, and tying its enable status to PCI_COMMAND_MASTER. Tested using setpci -s 03 COMMAND=3 while a ping was running on a NIC in slot 3. The kernel (Linux) detected the stall and recovered after the command setpci -s 03 COMMAND=7 was issued. Signed-off-by: Avi Kivity --- hw/pci.c | 12 ++++++++++-- hw/pci.h | 1 + 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index ecea286..6ba5ae5 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -782,7 +782,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, /* FIXME: Make dma_context_fn use MemoryRegions instead, so this path is * taken unconditionally */ /* FIXME: inherit memory region from bus creator */ - address_space_init(&pci_dev->bus_master_as, get_system_memory()); + memory_region_init_alias(&pci_dev->bus_master_enable_region, "bus master", + get_system_memory(), 0, + memory_region_size(get_system_memory())); + memory_region_set_enabled(&pci_dev->bus_master_enable_region, false); + address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region); pci_dev->dma = g_new(DMAContext, 1); dma_context_init(pci_dev->dma, &pci_dev->bus_master_as, NULL, NULL, NULL); } @@ -1060,8 +1064,12 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) range_covers_byte(addr, l, PCI_COMMAND)) pci_update_mappings(d); - if (range_covers_byte(addr, l, PCI_COMMAND)) + if (range_covers_byte(addr, l, PCI_COMMAND)) { pci_update_irq_disabled(d, was_irq_disabled); + memory_region_set_enabled(&d->bus_master_enable_region, + pci_get_word(d->config + PCI_COMMAND) + & PCI_COMMAND_MASTER); + } msi_write_config(d, addr, val, l); msix_write_config(d, addr, val, l); diff --git a/hw/pci.h b/hw/pci.h index 3192d81..a65e490 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -212,6 +212,7 @@ struct PCIDevice { char name[64]; PCIIORegion io_regions[PCI_NUM_REGIONS]; AddressSpace bus_master_as; + MemoryRegion bus_master_enable_region; DMAContext *dma; /* do not access the following fields */ -- 1.7.12