From: Alexander Graf <agraf@suse.de>
To: qemu-devel qemu-devel <qemu-devel@nongnu.org>
Cc: "qemu-ppc@nongnu.org List" <qemu-ppc@nongnu.org>
Subject: [Qemu-devel] [PATCH] PPC: KVM: Fix BAT put
Date: Fri, 5 Oct 2012 04:36:46 +0200 [thread overview]
Message-ID: <1349404606-24057-1-git-send-email-agraf@suse.de> (raw)
In the sregs API, upper and lower 32bit segments of the BAT registers
are swapped when doing a set. Since we need to support old kernels out
there, don't bother to fix it in the kernel, but instead work around
the problem in QEMU by swapping on put.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
target-ppc/kvm.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 1975323..93c5bb7 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -493,10 +493,11 @@ int kvm_arch_put_registers(CPUPPCState *env, int level)
/* Sync BATs */
for (i = 0; i < 8; i++) {
- sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[1][i] << 32)
- | env->DBAT[0][i];
- sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[1][i] << 32)
- | env->IBAT[0][i];
+ /* Beware. We have to swap upper and lower bits here */
+ sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32)
+ | env->DBAT[1][i];
+ sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32)
+ | env->IBAT[1][i];
}
ret = kvm_vcpu_ioctl(env, KVM_SET_SREGS, &sregs);
--
1.6.0.2
next reply other threads:[~2012-10-05 2:36 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-05 2:36 Alexander Graf [this message]
2012-10-05 3:29 ` [Qemu-devel] [Qemu-ppc] [PATCH] PPC: KVM: Fix BAT put David Gibson
2012-10-05 10:19 ` Alexander Graf
2012-10-06 18:35 ` [Qemu-devel] " Aurelien Jarno
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