From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: [Qemu-devel] [PATCH 13/23] target-sparc: Use DisasCompare and movcond in MOVCC
Date: Fri, 5 Oct 2012 16:55:00 -0700 [thread overview]
Message-ID: <1349481310-9237-14-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1349481310-9237-1-git-send-email-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-sparc/translate.c | 44 ++++++++++++++++++++------------------------
1 file changed, 20 insertions(+), 24 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index a7cd677..6c9be29 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -4075,38 +4075,34 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
{
int cc = GET_FIELD_SP(insn, 11, 12);
int cond = GET_FIELD_SP(insn, 14, 17);
- TCGv r_cond;
- int l1;
+ DisasCompare cmp;
- r_cond = tcg_temp_new();
if (insn & (1 << 18)) {
- if (cc == 0)
- gen_cond(r_cond, 0, cond, dc);
- else if (cc == 2)
- gen_cond(r_cond, 1, cond, dc);
- else
+ if (cc == 0) {
+ gen_compare(&cmp, 0, cond, dc);
+ } else if (cc == 2) {
+ gen_compare(&cmp, 1, cond, dc);
+ } else {
goto illegal_insn;
+ }
} else {
- gen_fcond(r_cond, cc, cond);
+ gen_fcompare(&cmp, cc, cond);
}
- l1 = gen_new_label();
-
- tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
- if (IS_IMM) { /* immediate */
- TCGv r_const;
-
+ /* The get_src2 above loaded the normal 13-bit
+ immediate field, not the 11-bit field we have
+ in movcc. But it did handle the reg case. */
+ if (IS_IMM) {
simm = GET_FIELD_SPs(insn, 0, 10);
- r_const = tcg_const_tl(simm);
- gen_movl_TN_reg(rd, r_const);
- tcg_temp_free(r_const);
- } else {
- rs2 = GET_FIELD_SP(insn, 0, 4);
- gen_movl_reg_TN(rs2, cpu_tmp0);
- gen_movl_TN_reg(rd, cpu_tmp0);
+ tcg_gen_movi_tl(cpu_src2, simm);
}
- gen_set_label(l1);
- tcg_temp_free(r_cond);
+
+ gen_movl_reg_TN(rd, cpu_dst);
+ tcg_gen_movcond_tl(cmp.cond, cpu_dst,
+ cmp.c1, cmp.c2,
+ cpu_src2, cpu_dst);
+ free_compare(&cmp);
+ gen_movl_TN_reg(rd, cpu_dst);
break;
}
case 0x2d: /* V9 sdivx */
--
1.7.11.4
next prev parent reply other threads:[~2012-10-05 23:55 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-05 23:54 [Qemu-devel] [PATCH 00/23] target-sparc comparison improvements Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 01/23] target-sparc: Tidy cpu_dump_state Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 02/23] target-sparc: Make CPU_LOG_INT useful by default Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 03/23] target-sparc: Tidy do_branch interfaces Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 04/23] target-sparc: Tidy flush_cond interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 05/23] target-sparc: Tidy gen_trap_ifnofpu interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 06/23] target-sparc: Tidy save_state interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 07/23] target-sparc: Tidy gen_mov_pc_npc interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 08/23] target-sparc: Tidy save_npc interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 09/23] target-sparc: Tidy gen_generic_branch interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 10/23] target-sparc: Introduce DisasCompare and functions to generate it Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 11/23] target-sparc: Use DisasCompare in Tcc Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 12/23] target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCC Richard Henderson
2012-10-05 23:55 ` Richard Henderson [this message]
2012-10-05 23:55 ` [Qemu-devel] [PATCH 14/23] target-sparc: Use DisasCompare and movcond in MOVR Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 15/23] target-sparc: Use movcond in gen_generic_branch Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 16/23] target-sparc: Move sdivx and udivx out of line Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 17/23] target-sparc: Tidy Tcc Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 18/23] target-sparc: Move taddcctv and tsubcctv out of line Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 19/23] target-sparc: Use movcond in mulscc Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 20/23] target-sparc: Use movcond for FMOV*R Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 21/23] target-sparc: Cleanup "global" temporary allocation Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 22/23] target-sparc: Fall through from not-taken trap Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 23/23] target-sparc: Optimize conditionals using SUBCC Richard Henderson
2012-10-07 18:48 ` Blue Swirl
2012-10-07 19:16 ` Richard Henderson
2012-10-07 22:40 ` Aurelien Jarno
2012-10-07 18:44 ` [Qemu-devel] [PATCH 00/23] target-sparc comparison improvements Blue Swirl
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