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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: [Qemu-devel] [PATCH 04/23] target-sparc: Tidy flush_cond interface
Date: Fri,  5 Oct 2012 16:54:51 -0700	[thread overview]
Message-ID: <1349481310-9237-5-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1349481310-9237-1-git-send-email-rth@twiddle.net>

We always pass cpu_cond to the cond parameter.  Use that global
register directly instead of passing it down.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 079a040..5b2d5ea 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1118,10 +1118,10 @@ static inline void gen_generic_branch(target_ulong npc1, target_ulong npc2,
 
 /* call this function before using the condition register as it may
    have been set for a jump */
-static inline void flush_cond(DisasContext *dc, TCGv cond)
+static inline void flush_cond(DisasContext *dc)
 {
     if (dc->npc == JUMP_PC) {
-        gen_generic_branch(dc->jump_pc[0], dc->jump_pc[1], cond);
+        gen_generic_branch(dc->jump_pc[0], dc->jump_pc[1], cpu_cond);
         dc->npc = DYNAMIC_PC;
     }
 }
@@ -1367,7 +1367,7 @@ static void do_branch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
             tcg_gen_mov_tl(cpu_pc, cpu_npc);
         }
     } else {
-        flush_cond(dc, cpu_cond);
+        flush_cond(dc);
         gen_cond(cpu_cond, cc, cond, dc);
         if (a) {
             gen_branch_a(dc, target, dc->npc, cpu_cond);
@@ -1416,7 +1416,7 @@ static void do_fbranch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
             tcg_gen_mov_tl(cpu_pc, cpu_npc);
         }
     } else {
-        flush_cond(dc, cpu_cond);
+        flush_cond(dc);
         gen_fcond(cpu_cond, cc, cond);
         if (a) {
             gen_branch_a(dc, target, dc->npc, cpu_cond);
@@ -1445,7 +1445,7 @@ static void do_branch_reg(DisasContext *dc, int32_t offset, uint32_t insn,
     if (unlikely(AM_CHECK(dc))) {
         target &= 0xffffffffULL;
     }
-    flush_cond(dc, cpu_cond);
+    flush_cond(dc);
     gen_cond_reg(cpu_cond, cond, r_reg);
     if (a) {
         gen_branch_a(dc, target, dc->npc, cpu_cond);
-- 
1.7.11.4

  parent reply	other threads:[~2012-10-05 23:55 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-05 23:54 [Qemu-devel] [PATCH 00/23] target-sparc comparison improvements Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 01/23] target-sparc: Tidy cpu_dump_state Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 02/23] target-sparc: Make CPU_LOG_INT useful by default Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 03/23] target-sparc: Tidy do_branch interfaces Richard Henderson
2012-10-05 23:54 ` Richard Henderson [this message]
2012-10-05 23:54 ` [Qemu-devel] [PATCH 05/23] target-sparc: Tidy gen_trap_ifnofpu interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 06/23] target-sparc: Tidy save_state interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 07/23] target-sparc: Tidy gen_mov_pc_npc interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 08/23] target-sparc: Tidy save_npc interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 09/23] target-sparc: Tidy gen_generic_branch interface Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 10/23] target-sparc: Introduce DisasCompare and functions to generate it Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 11/23] target-sparc: Use DisasCompare in Tcc Richard Henderson
2012-10-05 23:54 ` [Qemu-devel] [PATCH 12/23] target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCC Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 13/23] target-sparc: Use DisasCompare and movcond in MOVCC Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 14/23] target-sparc: Use DisasCompare and movcond in MOVR Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 15/23] target-sparc: Use movcond in gen_generic_branch Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 16/23] target-sparc: Move sdivx and udivx out of line Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 17/23] target-sparc: Tidy Tcc Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 18/23] target-sparc: Move taddcctv and tsubcctv out of line Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 19/23] target-sparc: Use movcond in mulscc Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 20/23] target-sparc: Use movcond for FMOV*R Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 21/23] target-sparc: Cleanup "global" temporary allocation Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 22/23] target-sparc: Fall through from not-taken trap Richard Henderson
2012-10-05 23:55 ` [Qemu-devel] [PATCH 23/23] target-sparc: Optimize conditionals using SUBCC Richard Henderson
2012-10-07 18:48   ` Blue Swirl
2012-10-07 19:16     ` Richard Henderson
2012-10-07 22:40   ` Aurelien Jarno
2012-10-07 18:44 ` [Qemu-devel] [PATCH 00/23] target-sparc comparison improvements Blue Swirl

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