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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 06/14] i386: factor gen_op_set_cc_op/tcg_gen_discard_tl around computing flags
Date: Sat,  6 Oct 2012 14:30:13 +0200	[thread overview]
Message-ID: <1349526621-13939-7-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1349526621-13939-1-git-send-email-pbonzini@redhat.com>

Before computing flags we need to store the cc_op to memory.  Move this
to gen_compute_eflags_c and gen_compute_eflags rather than doing it all
over the place.

Alo, after computing the flags in cpu_cc_src we are in EFLAGS mode.
Set s->cc_op and discard cpu_cc_dst in gen_compute_eflags, rather than
doing it all over the place.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-i386/translate.c | 103 +++++++++++++++++-------------------------------
 1 file modificato, 37 inserzioni(+), 66 rimozioni(-)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index 0821468..df81b78 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -824,55 +824,63 @@ static void gen_op_update_neg_cc(void)
 }
 
 /* compute eflags.C to reg */
-static void gen_compute_eflags_c(TCGv reg)
+static void gen_compute_eflags_c(DisasContext *s, TCGv reg)
 {
+    if (s->cc_op != CC_OP_DYNAMIC) {
+        gen_op_set_cc_op(s->cc_op);
+    }
     gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_env, cpu_cc_op);
     tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
 }
 
 /* compute all eflags to cc_src */
-static void gen_compute_eflags(TCGv reg)
+static void gen_compute_eflags(DisasContext *s, TCGv reg)
 {
+    if (s->cc_op != CC_OP_DYNAMIC) {
+        gen_op_set_cc_op(s->cc_op);
+    }
     gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_env, cpu_cc_op);
+    if (reg == cpu_cc_src) {
+        tcg_gen_discard_tl(cpu_cc_dst);
+        s->cc_op = CC_OP_EFLAGS;
+    }
     tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
 }
 
 static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
 {
-    if (s->cc_op != CC_OP_DYNAMIC)
-        gen_op_set_cc_op(s->cc_op);
     switch(jcc_op) {
     case JCC_O:
-        gen_compute_eflags(cpu_T[0]);
+        gen_compute_eflags(s, cpu_T[0]);
         tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 11);
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
         break;
     case JCC_B:
-        gen_compute_eflags_c(cpu_T[0]);
+        gen_compute_eflags_c(s, cpu_T[0]);
         break;
     case JCC_Z:
-        gen_compute_eflags(cpu_T[0]);
+        gen_compute_eflags(s, cpu_T[0]);
         tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 6);
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
         break;
     case JCC_BE:
-        gen_compute_eflags(cpu_tmp0);
+        gen_compute_eflags(s, cpu_tmp0);
         tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 6);
         tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
         break;
     case JCC_S:
-        gen_compute_eflags(cpu_T[0]);
+        gen_compute_eflags(s, cpu_T[0]);
         tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 7);
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
         break;
     case JCC_P:
-        gen_compute_eflags(cpu_T[0]);
+        gen_compute_eflags(s, cpu_T[0]);
         tcg_gen_shri_tl(cpu_T[0], cpu_T[0], 2);
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
         break;
     case JCC_L:
-        gen_compute_eflags(cpu_tmp0);
+        gen_compute_eflags(s, cpu_tmp0);
         tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 11); /* CC_O */
         tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 7); /* CC_S */
         tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
@@ -880,7 +888,7 @@ static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
         break;
     default:
     case JCC_LE:
-        gen_compute_eflags(cpu_tmp0);
+        gen_compute_eflags(s, cpu_tmp0);
         tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 11); /* CC_O */
         tcg_gen_shri_tl(cpu_tmp4, cpu_tmp0, 7); /* CC_S */
         tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 6); /* CC_Z */
@@ -1268,9 +1276,7 @@ static void gen_op(DisasContext *s1, int op, int ot, int d)
     }
     switch(op) {
     case OP_ADCL:
-        if (s1->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s1->cc_op);
-        gen_compute_eflags_c(cpu_tmp4);
+        gen_compute_eflags_c(s1, cpu_tmp4);
         tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
         tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_tmp4);
         if (d != OR_TMP0)
@@ -1285,9 +1291,7 @@ static void gen_op(DisasContext *s1, int op, int ot, int d)
         s1->cc_op = CC_OP_DYNAMIC;
         break;
     case OP_SBBL:
-        if (s1->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s1->cc_op);
-        gen_compute_eflags_c(cpu_tmp4);
+        gen_compute_eflags_c(s1, cpu_tmp4);
         tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
         tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_tmp4);
         if (d != OR_TMP0)
@@ -1361,9 +1365,7 @@ static void gen_inc(DisasContext *s1, int ot, int d, int c)
         gen_op_mov_TN_reg(ot, 0, d);
     else
         gen_op_ld_T0_A0(ot + s1->mem_index);
-    if (s1->cc_op != CC_OP_DYNAMIC)
-        gen_op_set_cc_op(s1->cc_op);
-    gen_compute_eflags_c(cpu_cc_src);
+    gen_compute_eflags_c(s1, cpu_cc_src);
     if (c > 0) {
         tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 1);
         s1->cc_op = CC_OP_INCB + ot;
@@ -1588,11 +1590,8 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1,
     }
     
     /* update eflags.  It is needed anyway most of the time, do it always.  */
-    if (s->cc_op != CC_OP_DYNAMIC)
-        gen_op_set_cc_op(s->cc_op);
-    gen_compute_eflags(cpu_cc_src);
-    tcg_gen_discard_tl(cpu_cc_dst);
-    s->cc_op = CC_OP_EFLAGS;
+    gen_compute_eflags(s, cpu_cc_src);
+    assert(s->cc_op == CC_OP_EFLAGS);
 
     label2 = gen_new_label();
     tcg_gen_brcondi_tl(TCG_COND_EQ, t1, 0, label2);
@@ -1668,12 +1667,8 @@ static void gen_rot_rm_im(DisasContext *s, int ot, int op1, int op2,
 
     if (op2 != 0) {
         /* update eflags */
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-
-        gen_compute_eflags(cpu_cc_src);
-        tcg_gen_discard_tl(cpu_cc_dst);
-        s->cc_op = CC_OP_EFLAGS;
+        gen_compute_eflags(s, cpu_cc_src);
+        assert(s->cc_op == CC_OP_EFLAGS);
 
         tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~(CC_O | CC_C));
         tcg_gen_xor_tl(cpu_tmp0, t1, t0);
@@ -1700,9 +1695,7 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
 
     if (s->cc_op != CC_OP_DYNAMIC)
         gen_op_set_cc_op(s->cc_op);
-    gen_compute_eflags(cpu_cc_src);
-    tcg_gen_discard_tl(cpu_cc_dst);
-    s->cc_op = CC_OP_EFLAGS;
+    gen_compute_eflags(s, cpu_cc_src);
 
     /* load */
     if (op1 == OR_TMP0)
@@ -1752,6 +1745,7 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
         gen_op_mov_reg_T0(ot, op1);
 
     /* update eflags */
+    assert(s->cc_op == CC_OP_EFLAGS);
     label1 = gen_new_label();
     tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cc_tmp, -1, label1);
 
@@ -6494,12 +6488,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
         if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
             goto illegal_op;
         gen_op_mov_TN_reg(OT_BYTE, 0, R_AH);
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-        gen_compute_eflags(cpu_cc_src);
-        tcg_gen_discard_tl(cpu_cc_dst);
-        s->cc_op = CC_OP_EFLAGS;
-
+        gen_compute_eflags(s, cpu_cc_src);
         tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
         tcg_gen_andi_tl(cpu_T[0], cpu_T[0], CC_S | CC_Z | CC_A | CC_P | CC_C);
         tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_T[0]);
@@ -6507,33 +6496,22 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
     case 0x9f: /* lahf */
         if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
             goto illegal_op;
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-        gen_compute_eflags(cpu_T[0]);
+        gen_compute_eflags(s, cpu_T[0]);
         /* Note: gen_compute_eflags() only gives the condition codes */
         tcg_gen_ori_tl(cpu_T[0], cpu_T[0], 0x02);
         gen_op_mov_reg_T0(OT_BYTE, R_AH);
         break;
     case 0xf5: /* cmc */
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-        gen_compute_eflags(cpu_cc_src);
+        gen_compute_eflags(s, cpu_cc_src);
         tcg_gen_xori_tl(cpu_cc_src, cpu_cc_src, CC_C);
-        s->cc_op = CC_OP_EFLAGS;
         break;
     case 0xf8: /* clc */
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-        gen_compute_eflags(cpu_cc_src);
+        gen_compute_eflags(s, cpu_cc_src);
         tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~CC_C);
-        s->cc_op = CC_OP_EFLAGS;
         break;
     case 0xf9: /* stc */
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-        gen_compute_eflags(cpu_cc_src);
+        gen_compute_eflags(s, cpu_cc_src);
         tcg_gen_ori_tl(cpu_cc_src, cpu_cc_src, CC_C);
-        s->cc_op = CC_OP_EFLAGS;
         break;
     case 0xfc: /* cld */
         tcg_gen_movi_i32(cpu_tmp2_i32, 1);
@@ -6861,9 +6839,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
     case 0xd6: /* salc */
         if (CODE64(s))
             goto illegal_op;
-        if (s->cc_op != CC_OP_DYNAMIC)
-            gen_op_set_cc_op(s->cc_op);
-        gen_compute_eflags_c(cpu_T[0]);
+        gen_compute_eflags_c(s, cpu_T[0]);
         tcg_gen_neg_tl(cpu_T[0], cpu_T[0]);
         gen_op_mov_reg_T0(OT_BYTE, R_EAX);
         break;
@@ -6887,11 +6863,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
             switch(b) {
             case 0: /* loopnz */
             case 1: /* loopz */
-                if (s->cc_op != CC_OP_DYNAMIC)
-                    gen_op_set_cc_op(s->cc_op);
                 gen_op_add_reg_im(s->aflag, R_ECX, -1);
                 gen_op_jz_ecx(s->aflag, l3);
-                gen_compute_eflags(cpu_tmp0);
+                gen_compute_eflags(s, cpu_tmp0);
                 tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_Z);
                 if (b == 0) {
                     tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
@@ -7433,12 +7407,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
            } else {
                 gen_op_mov_reg_v(ot, rm, t0);
             }
-            if (s->cc_op != CC_OP_DYNAMIC)
-                gen_op_set_cc_op(s->cc_op);
-            gen_compute_eflags(cpu_cc_src);
+            gen_compute_eflags(s, cpu_cc_src);
             tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~CC_Z);
             tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, t2);
-            s->cc_op = CC_OP_EFLAGS;
             tcg_temp_free(t0);
             tcg_temp_free(t1);
             tcg_temp_free(t2);
-- 
1.7.12.1

  parent reply	other threads:[~2012-10-06 12:30 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-06 12:30 [Qemu-devel] [CFT PATCH 00/14] Improve handling of x86 condition codes (tcg) Paolo Bonzini
2012-10-06 12:30 ` [Qemu-devel] [PATCH 01/14] i386: use OT_* consistently Paolo Bonzini
2012-10-07 18:50   ` Blue Swirl
2012-10-09 18:58   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 02/14] i386: introduce gen_ext_tl Paolo Bonzini
2012-10-07 18:53   ` Blue Swirl
2012-10-09 18:58   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 03/14] i386: factor setting of s->cc_op handling for string functions Paolo Bonzini
2012-10-09 18:59   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 04/14] i386: drop cc_op argument of gen_jcc1 Paolo Bonzini
2012-10-09 18:59   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 05/14] i386: move eflags computation closer to gen_op_set_cc_op Paolo Bonzini
2012-10-09 19:02   ` Richard Henderson
2012-10-06 12:30 ` Paolo Bonzini [this message]
2012-10-09 19:03   ` [Qemu-devel] [PATCH 06/14] i386: factor gen_op_set_cc_op/tcg_gen_discard_tl around computing flags Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 07/14] i386: add helper functions to get other flags Paolo Bonzini
2012-10-07 19:04   ` Blue Swirl
2012-10-09 19:04   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 08/14] i386: do not compute eflags multiple times consecutively Paolo Bonzini
2012-10-07 19:09   ` Blue Swirl
2012-10-09 19:14   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 09/14] i386: do not call helper to compute ZF/SF Paolo Bonzini
2012-10-07 19:16   ` Blue Swirl
2012-10-09 19:15   ` Richard Henderson
2012-10-09 19:16   ` Richard Henderson
2012-10-10  6:42     ` Paolo Bonzini
2012-10-06 12:30 ` [Qemu-devel] [PATCH 10/14] i386: use inverted setcond when computing NS or NZ Paolo Bonzini
2012-10-07 19:19   ` Blue Swirl
2012-10-09 19:17   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 11/14] i386: convert gen_compute_eflags_c to TCG Paolo Bonzini
2012-10-07 19:35   ` Blue Swirl
2012-10-09 20:07   ` Richard Henderson
2012-10-10  6:47     ` Paolo Bonzini
2012-10-06 12:30 ` [Qemu-devel] [PATCH 12/14] i386: change gen_setcc_slow_T0 to gen_setcc_slow Paolo Bonzini
2012-10-07 19:36   ` Blue Swirl
2012-10-09 20:07   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 13/14] i386: optimize setbe Paolo Bonzini
2012-10-07 19:43   ` Blue Swirl
2012-10-09 20:13   ` Richard Henderson
2012-10-06 12:30 ` [Qemu-devel] [PATCH 14/14] i386: optimize setcc instructions Paolo Bonzini
2012-10-07 19:58   ` Blue Swirl
2012-10-09 20:22   ` Richard Henderson
2012-10-10  6:51     ` Paolo Bonzini

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