From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 10/14] target-mips: implement movn/movz using movcond
Date: Tue, 9 Oct 2012 22:27:34 +0200 [thread overview]
Message-ID: <1349814458-21739-11-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1349814458-21739-1-git-send-email-aurelien@aurel32.net>
Avoid the branches in movn/movz implementation and replace them with
movcond. Also update a wrong command.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
target-mips/translate.c | 27 ++++++++++++---------------
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index b6eb46a..9a22432 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1920,35 +1920,32 @@ static void gen_cond_move(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
int rd, int rs, int rt)
{
const char *opn = "cond move";
- int l1;
+ TCGv t0, t1, t2;
if (rd == 0) {
- /* If no destination, treat it as a NOP.
- For add & sub, we must generate the overflow exception when needed. */
+ /* If no destination, treat it as a NOP. */
MIPS_DEBUG("NOP");
return;
}
- l1 = gen_new_label();
+ t0 = tcg_temp_new();
+ gen_load_gpr(t0, rt);
+ t1 = tcg_const_tl(0);
+ t2 = tcg_temp_new();
+ gen_load_gpr(t2, rs);
switch (opc) {
case OPC_MOVN:
- if (likely(rt != 0))
- tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rt], 0, l1);
- else
- tcg_gen_br(l1);
+ tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rd], t0, t1, t2, cpu_gpr[rd]);
opn = "movn";
break;
case OPC_MOVZ:
- if (likely(rt != 0))
- tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[rt], 0, l1);
+ tcg_gen_movcond_tl(TCG_COND_EQ, cpu_gpr[rd], t0, t1, t2, cpu_gpr[rd]);
opn = "movz";
break;
}
- if (rs != 0)
- tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
- else
- tcg_gen_movi_tl(cpu_gpr[rd], 0);
- gen_set_label(l1);
+ tcg_temp_free(t2);
+ tcg_temp_free(t1);
+ tcg_temp_free(t0);
(void)opn; /* avoid a compiler warning */
MIPS_DEBUG("%s %s, %s, %s", opn, regnames[rd], regnames[rs], regnames[rt]);
--
1.7.10.4
next prev parent reply other threads:[~2012-10-09 20:27 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-09 20:27 [Qemu-devel] [PATCH 00/14] target-mips: misc fixes and optimizations Aurelien Jarno
2012-10-09 20:27 ` [Qemu-devel] [PATCH 01/14] softfloat: implement fused multiply-add NaN propagation for MIPS Aurelien Jarno
2012-10-09 20:27 ` [Qemu-devel] [PATCH 02/14] target-mips: use the softfloat floatXX_muladd functions Aurelien Jarno
2012-10-10 19:58 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 03/14] target-mips: fix FPU exceptions Aurelien Jarno
2012-10-10 20:05 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 04/14] target-mips: use softfloat constants when possible Aurelien Jarno
2012-10-10 20:09 ` Richard Henderson
2012-10-16 23:26 ` Aurelien Jarno
2012-10-09 20:27 ` [Qemu-devel] [PATCH 05/14] target-mips: cleanup load/store operations Aurelien Jarno
2012-10-10 20:10 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 06/14] target-mips: optimize load operations Aurelien Jarno
2012-10-10 20:11 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 07/14] target-mips: simplify load/store microMIPS helpers Aurelien Jarno
2012-10-10 20:15 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 08/14] target-mips: implement unaligned loads using TCG Aurelien Jarno
2012-10-10 20:28 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 09/14] target-mips: don't use local temps for store conditional Aurelien Jarno
2012-10-10 20:31 ` Richard Henderson
2012-10-09 20:27 ` Aurelien Jarno [this message]
2012-10-10 20:33 ` [Qemu-devel] [PATCH 10/14] target-mips: implement movn/movz using movcond Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 11/14] target-mips: optimize ddiv/ddivu/div/divu with movcond Aurelien Jarno
2012-10-10 20:38 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 12/14] target-mips: use deposit instead of hardcoded version Aurelien Jarno
2012-10-10 20:43 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 13/14] target-mips: fix TLBR wrt SEGMask Aurelien Jarno
2012-10-10 20:44 ` Richard Henderson
2012-10-09 20:27 ` [Qemu-devel] [PATCH 14/14] target-mips: don't flush extra TLB on permissions upgrade Aurelien Jarno
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1349814458-21739-11-git-send-email-aurelien@aurel32.net \
--to=aurelien@aurel32.net \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).