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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: [Qemu-devel] [PATCH 12/20] target-sparc: Avoid cpu_tmp32 in Write Priv Register
Date: Tue,  9 Oct 2012 15:04:19 -0700	[thread overview]
Message-ID: <1349820267-26320-13-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1349820267-26320-1-git-send-email-rth@twiddle.net>

No need to copy to a temporary to store 32 bits.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 56 +++++++++++++++++++++---------------------------
 1 file changed, 24 insertions(+), 32 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 43e44d5..353ebc6 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -3801,9 +3801,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
 
                                     r_tsptr = tcg_temp_new_ptr();
                                     gen_load_trap_state_at_tl(r_tsptr, cpu_env);
-                                    tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                    tcg_gen_st_i32(cpu_tmp32, r_tsptr,
-                                                   offsetof(trap_state, tt));
+                                    tcg_gen_st32_tl(cpu_tmp0, r_tsptr,
+                                                    offsetof(trap_state, tt));
                                     tcg_temp_free_ptr(r_tsptr);
                                 }
                                 break;
@@ -3829,8 +3828,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
                                 break;
                             case 7: // tl
                                 save_state(dc);
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
                                                offsetof(CPUSPARCState, tl));
                                 dc->npc = DYNAMIC_PC;
                                 break;
@@ -3841,40 +3839,34 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
                                 gen_helper_wrcwp(cpu_env, cpu_tmp0);
                                 break;
                             case 10: // cansave
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
-                                               offsetof(CPUSPARCState,
-                                                        cansave));
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
+                                                offsetof(CPUSPARCState,
+                                                         cansave));
                                 break;
                             case 11: // canrestore
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
-                                               offsetof(CPUSPARCState,
-                                                        canrestore));
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
+                                                offsetof(CPUSPARCState,
+                                                         canrestore));
                                 break;
                             case 12: // cleanwin
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
-                                               offsetof(CPUSPARCState,
-                                                        cleanwin));
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
+                                                offsetof(CPUSPARCState,
+                                                         cleanwin));
                                 break;
                             case 13: // otherwin
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
-                                               offsetof(CPUSPARCState,
-                                                        otherwin));
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
+                                                offsetof(CPUSPARCState,
+                                                         otherwin));
                                 break;
                             case 14: // wstate
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
-                                               offsetof(CPUSPARCState,
-                                                        wstate));
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
+                                                offsetof(CPUSPARCState,
+                                                         wstate));
                                 break;
                             case 16: // UA2005 gl
                                 CHECK_IU_FEATURE(dc, GL);
-                                tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                                tcg_gen_st_i32(cpu_tmp32, cpu_env,
-                                               offsetof(CPUSPARCState, gl));
+                                tcg_gen_st32_tl(cpu_tmp0, cpu_env,
+                                                offsetof(CPUSPARCState, gl));
                                 break;
                             case 26: // UA2005 strand status
                                 CHECK_IU_FEATURE(dc, HYPV);
@@ -3886,11 +3878,11 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
                                 goto illegal_insn;
                             }
 #else
-                            tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
-                            if (dc->def->nwindows != 32)
-                                tcg_gen_andi_tl(cpu_tmp32, cpu_tmp32,
+                            tcg_gen_trunc_tl_i32(cpu_wim, cpu_tmp0);
+                            if (dc->def->nwindows != 32) {
+                                tcg_gen_andi_tl(cpu_wim, cpu_wim,
                                                 (1 << dc->def->nwindows) - 1);
-                            tcg_gen_mov_i32(cpu_wim, cpu_tmp32);
+                            }
 #endif
                         }
                         break;
-- 
1.7.11.4

  parent reply	other threads:[~2012-10-09 22:04 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-09 22:04 [Qemu-devel] [PATCH 00/20] target-sparc: Cleanup handling of temps Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 01/20] target-sparc: Add gen_load/store/dest_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 02/20] target-sparc: Conversion to gen_*_gpr, part 1 Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 03/20] target-sparc: Use gen_load_gpr in get_src[12] Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 04/20] target-sparc: Convert asi helpers to gen_*_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 05/20] target-sparc: Convert swap to gen_load/store_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 06/20] target-sparc: Finish conversion to gen_load_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 07/20] target-sparc: Cleanup cpu_src[12] allocation Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 08/20] target-sparc: Make the cpu_addr variable local to load/store handling Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 09/20] target-sparc: Split out get_temp_i32 Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 10/20] target-sparc: Use get_temp_i32 in gen_dest_fpr_F Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 11/20] target-sparc: Avoid cpu_tmp32 in Read Priv Register Richard Henderson
2012-10-09 22:04 ` Richard Henderson [this message]
2012-10-09 22:04 ` [Qemu-devel] [PATCH 13/20] target-sparc: Tidy ldfsr, stfsr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 14/20] target-sparc: Remove usage of cpu_tmp64 from most helper functions Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 15/20] target-sparc: Don't use a temporary for gen_dest_fpr_D Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 16/20] target-sparc: Remove cpu_tmp64 use from softint insns Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 17/20] target-sparc: Remove last uses of cpu_tmp64 Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 18/20] target-sparc: Only use cpu_dst for eventual writes to a gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 19/20] target-sparc: Make cpu_dst local to OP=2 insns Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 20/20] target-sparc: Remove cpu_tmp0 as a global Richard Henderson
2012-10-13 10:36 ` [Qemu-devel] [PATCH 00/20] target-sparc: Cleanup handling of temps Blue Swirl
  -- strict thread matches above, loose matches on Subject: below --
2012-10-16  9:32 [Qemu-devel] [PATCH v2 " Richard Henderson
2012-10-16  9:32 ` [Qemu-devel] [PATCH 12/20] target-sparc: Avoid cpu_tmp32 in Write Priv Register Richard Henderson

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