qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: [Qemu-devel] [PATCH 14/20] target-sparc: Remove usage of cpu_tmp64 from most helper functions
Date: Tue,  9 Oct 2012 15:04:21 -0700	[thread overview]
Message-ID: <1349820267-26320-15-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1349820267-26320-1-git-send-email-rth@twiddle.net>

Use a locally allocated temporary instead.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 73 +++++++++++++++++++++++++++++-------------------
 1 file changed, 44 insertions(+), 29 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index ed341b8..9b7bbef 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2071,16 +2071,18 @@ static inline void gen_stf_asi(TCGv addr, int insn, int size, int rd)
 static inline void gen_swap_asi(TCGv dst, TCGv src, TCGv addr, int insn)
 {
     TCGv_i32 r_asi, r_size, r_sign;
+    TCGv_i64 t64 = tcg_temp_new_i64();
 
     r_asi = gen_get_asi(insn, addr);
     r_size = tcg_const_i32(4);
     r_sign = tcg_const_i32(0);
-    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
+    gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
     tcg_temp_free_i32(r_sign);
     gen_helper_st_asi(cpu_env, addr, src, r_asi, r_size);
     tcg_temp_free_i32(r_size);
     tcg_temp_free_i32(r_asi);
-    tcg_gen_trunc_i64_tl(dst, cpu_tmp64);
+    tcg_gen_trunc_i64_tl(dst, t64);
+    tcg_temp_free_i64(t64);
 }
 
 static inline void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
@@ -2100,13 +2102,15 @@ static inline void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
 {
     TCGv_i32 r_asi, r_size;
     TCGv lo = gen_load_gpr(dc, rd + 1);
+    TCGv_i64 t64 = tcg_temp_new_i64();
 
-    tcg_gen_concat_tl_i64(cpu_tmp64, lo, hi);
+    tcg_gen_concat_tl_i64(t64, lo, hi);
     r_asi = gen_get_asi(insn, addr);
     r_size = tcg_const_i32(8);
-    gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size);
+    gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size);
     tcg_temp_free_i32(r_size);
     tcg_temp_free_i32(r_asi);
+    tcg_temp_free_i64(t64);
 }
 
 static inline void gen_cas_asi(DisasContext *dc, TCGv addr,
@@ -2139,46 +2143,52 @@ static inline void gen_ld_asi(TCGv dst, TCGv addr, int insn, int size,
                               int sign)
 {
     TCGv_i32 r_asi, r_size, r_sign;
+    TCGv_i64 t64 = tcg_temp_new_i64();
 
     r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
     r_size = tcg_const_i32(size);
     r_sign = tcg_const_i32(sign);
-    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
-    tcg_temp_free(r_sign);
-    tcg_temp_free(r_size);
-    tcg_temp_free(r_asi);
-    tcg_gen_trunc_i64_tl(dst, cpu_tmp64);
+    gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
+    tcg_temp_free_i32(r_sign);
+    tcg_temp_free_i32(r_size);
+    tcg_temp_free_i32(r_asi);
+    tcg_gen_trunc_i64_tl(dst, t64);
+    tcg_temp_free_i64(t64);
 }
 
 static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size)
 {
     TCGv_i32 r_asi, r_size;
+    TCGv_i64 t64 = tcg_temp_new_i64();
 
-    tcg_gen_extu_tl_i64(cpu_tmp64, src);
+    tcg_gen_extu_tl_i64(t64, src);
     r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
     r_size = tcg_const_i32(size);
-    gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size);
-    tcg_temp_free(r_size);
-    tcg_temp_free(r_asi);
+    gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size);
+    tcg_temp_free_i32(r_size);
+    tcg_temp_free_i32(r_asi);
+    tcg_temp_free_i64(t64);
 }
 
 static inline void gen_swap_asi(TCGv dst, TCGv src, TCGv addr, int insn)
 {
     TCGv_i32 r_asi, r_size, r_sign;
-    TCGv_i64 r_val;
+    TCGv_i64 r_val, t64;
 
     r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
     r_size = tcg_const_i32(4);
     r_sign = tcg_const_i32(0);
-    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
+    t64 = tcg_temp_new_i64();
+    gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
     tcg_temp_free(r_sign);
     r_val = tcg_temp_new_i64();
     tcg_gen_extu_tl_i64(r_val, src);
     gen_helper_st_asi(cpu_env, addr, r_val, r_asi, r_size);
     tcg_temp_free_i64(r_val);
-    tcg_temp_free(r_size);
-    tcg_temp_free(r_asi);
-    tcg_gen_trunc_i64_tl(dst, cpu_tmp64);
+    tcg_temp_free_i32(r_size);
+    tcg_temp_free_i32(r_asi);
+    tcg_gen_trunc_i64_tl(dst, t64);
+    tcg_temp_free_i64(t64);
 }
 
 static inline void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
@@ -2186,21 +2196,24 @@ static inline void gen_ldda_asi(DisasContext *dc, TCGv hi, TCGv addr,
 {
     TCGv_i32 r_asi, r_size, r_sign;
     TCGv t;
+    TCGv_i64 t64;
 
     r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
     r_size = tcg_const_i32(8);
     r_sign = tcg_const_i32(0);
-    gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign);
-    tcg_temp_free(r_sign);
-    tcg_temp_free(r_size);
-    tcg_temp_free(r_asi);
+    t64 = tcg_temp_new_i64();
+    gen_helper_ld_asi(t64, cpu_env, addr, r_asi, r_size, r_sign);
+    tcg_temp_free_i32(r_sign);
+    tcg_temp_free_i32(r_size);
+    tcg_temp_free_i32(r_asi);
 
     t = gen_dest_gpr(dc, rd + 1);
-    tcg_gen_trunc_i64_tl(t, cpu_tmp64);
+    tcg_gen_trunc_i64_tl(t, t64);
     gen_store_gpr(dc, rd + 1, t);
 
-    tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32);
-    tcg_gen_trunc_i64_tl(hi, cpu_tmp64);
+    tcg_gen_shri_i64(t64, t64, 32);
+    tcg_gen_trunc_i64_tl(hi, t64);
+    tcg_temp_free_i64(t64);
     gen_store_gpr(dc, rd, hi);
 }
 
@@ -2209,13 +2222,15 @@ static inline void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
 {
     TCGv_i32 r_asi, r_size;
     TCGv lo = gen_load_gpr(dc, rd + 1);
+    TCGv_i64 t64 = tcg_temp_new_i64();
 
-    tcg_gen_concat_tl_i64(cpu_tmp64, lo, hi);
+    tcg_gen_concat_tl_i64(t64, lo, hi);
     r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
     r_size = tcg_const_i32(8);
-    gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size);
-    tcg_temp_free(r_size);
-    tcg_temp_free(r_asi);
+    gen_helper_st_asi(cpu_env, addr, t64, r_asi, r_size);
+    tcg_temp_free_i32(r_size);
+    tcg_temp_free_i32(r_asi);
+    tcg_temp_free_i64(t64);
 }
 #endif
 
-- 
1.7.11.4

  parent reply	other threads:[~2012-10-09 22:04 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-09 22:04 [Qemu-devel] [PATCH 00/20] target-sparc: Cleanup handling of temps Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 01/20] target-sparc: Add gen_load/store/dest_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 02/20] target-sparc: Conversion to gen_*_gpr, part 1 Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 03/20] target-sparc: Use gen_load_gpr in get_src[12] Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 04/20] target-sparc: Convert asi helpers to gen_*_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 05/20] target-sparc: Convert swap to gen_load/store_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 06/20] target-sparc: Finish conversion to gen_load_gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 07/20] target-sparc: Cleanup cpu_src[12] allocation Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 08/20] target-sparc: Make the cpu_addr variable local to load/store handling Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 09/20] target-sparc: Split out get_temp_i32 Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 10/20] target-sparc: Use get_temp_i32 in gen_dest_fpr_F Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 11/20] target-sparc: Avoid cpu_tmp32 in Read Priv Register Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 12/20] target-sparc: Avoid cpu_tmp32 in Write " Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 13/20] target-sparc: Tidy ldfsr, stfsr Richard Henderson
2012-10-09 22:04 ` Richard Henderson [this message]
2012-10-09 22:04 ` [Qemu-devel] [PATCH 15/20] target-sparc: Don't use a temporary for gen_dest_fpr_D Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 16/20] target-sparc: Remove cpu_tmp64 use from softint insns Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 17/20] target-sparc: Remove last uses of cpu_tmp64 Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 18/20] target-sparc: Only use cpu_dst for eventual writes to a gpr Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 19/20] target-sparc: Make cpu_dst local to OP=2 insns Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 20/20] target-sparc: Remove cpu_tmp0 as a global Richard Henderson
2012-10-13 10:36 ` [Qemu-devel] [PATCH 00/20] target-sparc: Cleanup handling of temps Blue Swirl
  -- strict thread matches above, loose matches on Subject: below --
2012-10-16  9:32 [Qemu-devel] [PATCH v2 " Richard Henderson
2012-10-16  9:32 ` [Qemu-devel] [PATCH 14/20] target-sparc: Remove usage of cpu_tmp64 from most helper functions Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1349820267-26320-15-git-send-email-rth@twiddle.net \
    --to=rth@twiddle.net \
    --cc=blauwirbel@gmail.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).