From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:48028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhuy-0004zQ-HT for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TLhux-0001lL-In for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:48 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:34860) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLhux-0001fh-Cr for qemu-devel@nongnu.org; Tue, 09 Oct 2012 18:04:47 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so5751708pbb.4 for ; Tue, 09 Oct 2012 15:04:47 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 9 Oct 2012 15:04:23 -0700 Message-Id: <1349820267-26320-17-git-send-email-rth@twiddle.net> In-Reply-To: <1349820267-26320-1-git-send-email-rth@twiddle.net> References: <1349820267-26320-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 16/20] target-sparc: Remove cpu_tmp64 use from softint insns List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl The use of "tl" functions and a tmp64 is logically incompatible. Use cpu_tmp0 instead. Signed-off-by: Richard Henderson --- target-sparc/translate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 00ceb9d..64feaa3 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -3655,20 +3655,20 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) case 0x14: /* Softint set */ if (!supervisor(dc)) goto illegal_insn; - tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); - gen_helper_set_softint(cpu_env, cpu_tmp64); + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); + gen_helper_set_softint(cpu_env, cpu_tmp0); break; case 0x15: /* Softint clear */ if (!supervisor(dc)) goto illegal_insn; - tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); - gen_helper_clear_softint(cpu_env, cpu_tmp64); + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); + gen_helper_clear_softint(cpu_env, cpu_tmp0); break; case 0x16: /* Softint write */ if (!supervisor(dc)) goto illegal_insn; - tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); - gen_helper_write_softint(cpu_env, cpu_tmp64); + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); + gen_helper_write_softint(cpu_env, cpu_tmp0); break; case 0x17: /* Tick compare */ #if !defined(CONFIG_USER_ONLY) -- 1.7.11.4