From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TM7bl-0007jQ-Tw for qemu-devel@nongnu.org; Wed, 10 Oct 2012 21:30:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TM7bk-0003mf-Hc for qemu-devel@nongnu.org; Wed, 10 Oct 2012 21:30:41 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 11 Oct 2012 03:30:04 +0200 Message-Id: <1349919009-28904-3-git-send-email-afaerber@suse.de> In-Reply-To: <1349919009-28904-1-git-send-email-afaerber@suse.de> References: <1349919009-28904-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v2 2/7] ppc: Pass PowerPCCPU to {ppc6xx, ppc970, power7, ppc40x, ppce500}_set_irq() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, agraf@suse.de, =?UTF-8?q?Andreas=20F=C3=A4rber?= Needed for changing qemu_cpu_kick() argument type to CPUState and for moving halted field into CPUState. Signed-off-by: Andreas F=C3=A4rber --- hw/ppc.c | 55 +++++++++++++++++++++++++++++++++++-------------------- 1 Datei ge=C3=A4ndert, 35 Zeilen hinzugef=C3=BCgt(+), 20 Zeilen entfernt= (-) diff --git a/hw/ppc.c b/hw/ppc.c index 98546de..ada100b 100644 --- a/hw/ppc.c +++ b/hw/ppc.c @@ -75,9 +75,10 @@ void ppc_set_irq(CPUPPCState *env, int n_IRQ, int leve= l) } =20 /* PowerPC 6xx / 7xx internal IRQ controller */ -static void ppc6xx_set_irq (void *opaque, int pin, int level) +static void ppc6xx_set_irq(void *opaque, int pin, int level) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; int cur_level; =20 LOG_IRQ("%s: env %p pin %d level %d\n", __func__, @@ -151,17 +152,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, = int level) } } =20 -void ppc6xx_irq_init (CPUPPCState *env) +void ppc6xx_irq_init(CPUPPCState *env) { - env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env= , + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + + env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu= , PPC6xx_INPUT_NB); } =20 #if defined(TARGET_PPC64) /* PowerPC 970 internal IRQ controller */ -static void ppc970_set_irq (void *opaque, int pin, int level) +static void ppc970_set_irq(void *opaque, int pin, int level) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; int cur_level; =20 LOG_IRQ("%s: env %p pin %d level %d\n", __func__, @@ -233,16 +237,19 @@ static void ppc970_set_irq (void *opaque, int pin, = int level) } } =20 -void ppc970_irq_init (CPUPPCState *env) +void ppc970_irq_init(CPUPPCState *env) { - env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppc970_set_irq, env= , + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + + env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu= , PPC970_INPUT_NB); } =20 /* POWER7 internal IRQ controller */ -static void power7_set_irq (void *opaque, int pin, int level) +static void power7_set_irq(void *opaque, int pin, int level) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; =20 LOG_IRQ("%s: env %p pin %d level %d\n", __func__, env, pin, level); @@ -266,17 +273,20 @@ static void power7_set_irq (void *opaque, int pin, = int level) } } =20 -void ppcPOWER7_irq_init (CPUPPCState *env) +void ppcPOWER7_irq_init(CPUPPCState *env) { - env->irq_inputs =3D (void **)qemu_allocate_irqs(&power7_set_irq, env= , + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + + env->irq_inputs =3D (void **)qemu_allocate_irqs(&power7_set_irq, cpu= , POWER7_INPUT_NB); } #endif /* defined(TARGET_PPC64) */ =20 /* PowerPC 40x internal IRQ controller */ -static void ppc40x_set_irq (void *opaque, int pin, int level) +static void ppc40x_set_irq(void *opaque, int pin, int level) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; int cur_level; =20 LOG_IRQ("%s: env %p pin %d level %d\n", __func__, @@ -346,16 +356,19 @@ static void ppc40x_set_irq (void *opaque, int pin, = int level) } } =20 -void ppc40x_irq_init (CPUPPCState *env) +void ppc40x_irq_init(CPUPPCState *env) { + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppc40x_set_irq, - env, PPC40x_INPUT_NB); + cpu, PPC40x_INPUT_NB); } =20 /* PowerPC E500 internal IRQ controller */ -static void ppce500_set_irq (void *opaque, int pin, int level) +static void ppce500_set_irq(void *opaque, int pin, int level) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; int cur_level; =20 LOG_IRQ("%s: env %p pin %d level %d\n", __func__, @@ -407,10 +420,12 @@ static void ppce500_set_irq (void *opaque, int pin,= int level) } } =20 -void ppce500_irq_init (CPUPPCState *env) +void ppce500_irq_init(CPUPPCState *env) { + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppce500_set_irq, - env, PPCE500_INPUT_NB); + cpu, PPCE500_INPUT_NB)= ; } /***********************************************************************= ******/ /* PowerPC time base and decrementer emulation */ --=20 1.7.10.4