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From: David Gibson <david@gibson.dropbear.id.au>
To: agraf@suse.de, quintela@redhat.com
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 01/15] pseries: Split xics irq configuration from state information
Date: Mon, 15 Oct 2012 10:24:28 +1000	[thread overview]
Message-ID: <1350260682-21428-2-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1350260682-21428-1-git-send-email-david@gibson.dropbear.id.au>

Currently the XICS irq controller code has a per-irq state structure which
amongst other things includes whether the interrupt is level or message
triggered - this is configured by the platform code, and is not directly
visible to the guest.  This leads to a slightly awkward construct at reset
time where we need to reset everything in the state structure _except_ the
lsi/msi flag, which needs to retain the information given at platform init
time.

More importantly this flag will make matching the qemu state to the KVM
state for the upcoming in-kernel XICS implementation more awkward.  This
patch, therefore, removes this flag from the per-irq state structure,
instead adding a parallel array giving the lsi/msi configuration per irq.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/xics.c |   20 ++++++++------------
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/hw/xics.c b/hw/xics.c
index 403afdb..5e20f0f 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -179,13 +179,13 @@ struct ics_irq_state {
 #define XICS_STATUS_REJECTED           0x4
 #define XICS_STATUS_MASKED_PENDING     0x8
     uint8_t status;
-    bool lsi;
 };
 
 struct ics_state {
     int nr_irqs;
     int offset;
     qemu_irq *qirqs;
+    bool *islsi;
     struct ics_irq_state *irqs;
     struct icp_state *icp;
 };
@@ -254,9 +254,8 @@ static void set_irq_lsi(struct ics_state *ics, int srcno, int val)
 static void ics_set_irq(void *opaque, int srcno, int val)
 {
     struct ics_state *ics = (struct ics_state *)opaque;
-    struct ics_irq_state *irq = ics->irqs + srcno;
 
-    if (irq->lsi) {
+    if (ics->islsi[srcno]) {
         set_irq_lsi(ics, srcno, val);
     } else {
         set_irq_msi(ics, srcno, val);
@@ -293,7 +292,7 @@ static void ics_write_xive(struct ics_state *ics, int nr, int server,
 
     trace_xics_ics_write_xive(nr, srcno, server, priority);
 
-    if (irq->lsi) {
+    if (ics->islsi[srcno]) {
         write_xive_lsi(ics, srcno);
     } else {
         write_xive_msi(ics, srcno);
@@ -314,10 +313,8 @@ static void ics_resend(struct ics_state *ics)
     int i;
 
     for (i = 0; i < ics->nr_irqs; i++) {
-        struct ics_irq_state *irq = ics->irqs + i;
-
         /* FIXME: filter by server#? */
-        if (irq->lsi) {
+        if (ics->islsi[i]) {
             resend_lsi(ics, i);
         } else {
             resend_msi(ics, i);
@@ -332,7 +329,7 @@ static void ics_eoi(struct ics_state *ics, int nr)
 
     trace_xics_ics_eoi(nr);
 
-    if (irq->lsi) {
+    if (ics->islsi[srcno]) {
         irq->status &= ~XICS_STATUS_SENT;
     }
 }
@@ -354,7 +351,7 @@ void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi)
 {
     assert(ics_valid_irq(icp->ics, irq));
 
-    icp->ics->irqs[irq - icp->ics->offset].lsi = lsi;
+    icp->ics->islsi[irq - icp->ics->offset] = lsi;
 }
 
 static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,
@@ -515,10 +512,8 @@ static void xics_reset(void *opaque)
         qemu_set_irq(icp->ss[i].output, 0);
     }
 
+    memset(ics->irqs, 0, sizeof(struct ics_irq_state) * ics->nr_irqs);
     for (i = 0; i < ics->nr_irqs; i++) {
-        /* Reset everything *except* the type */
-        ics->irqs[i].server = 0;
-        ics->irqs[i].status = 0;
         ics->irqs[i].priority = 0xff;
         ics->irqs[i].saved_priority = 0xff;
     }
@@ -559,6 +554,7 @@ struct icp_state *xics_system_init(int nr_servers, int nr_irqs)
     ics->nr_irqs = nr_irqs;
     ics->offset = XICS_IRQ_BASE;
     ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state));
+    ics->islsi = g_malloc0(nr_irqs * sizeof(bool));
 
     icp->ics = ics;
     ics->icp = icp;
-- 
1.7.10.4

  reply	other threads:[~2012-10-15  0:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-15  0:24 [Qemu-devel] RFC: savevm/migration support for pseries David Gibson
2012-10-15  0:24 ` David Gibson [this message]
2012-10-15  0:24 ` [Qemu-devel] [PATCH 02/15] target-pcc: Convert ppcemb_tlb_t to use fixed 64-bit RPN David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 03/15] savevm: Add VMSTATE_UINT64_EQUAL helpers David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 04/15] savevm: Add VMSTATE_UINTTL_EQUAL helper David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 05/15] savevm: Add VMSTATE_FLOAT64 helpers David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 06/15] savevm: Add VMSTATE_STRUCT_VARRAY_POINTER_UINT32 David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 07/15] savevm: Fix bugs in the VMSTATE_VBUFFER_MULTIPLY definition David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 08/15] savevm: Implement VMS_DIVIDE flag David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 09/15] target-ppc: Convert ppc cpu savevm to VMStateDescription David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 10/15] pseries: savevm support for XICS interrupt controller David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 11/15] pseries: savevm support for VIO devices David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 12/15] pseries: savevm support for PAPR VIO logical lan David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 13/15] pseries: savevm support for PAPR TCE tables David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 14/15] pseries: savevm support for PAPR virtual SCSI David Gibson
2012-10-15  0:24 ` [Qemu-devel] [PATCH 15/15] pseries: savevm support for pseries machine David Gibson

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