From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: blauwirbel@gmail.com
Subject: [Qemu-devel] [PATCH 11/20] target-sparc: Avoid cpu_tmp32 in Read Priv Register
Date: Tue, 16 Oct 2012 19:32:22 +1000 [thread overview]
Message-ID: <1350379951-17615-12-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1350379951-17615-1-git-send-email-rth@twiddle.net>
We don't need another temporary here. Load directly into the
register we want to set.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-sparc/translate.c | 53 +++++++++++++++++++-----------------------------
1 file changed, 21 insertions(+), 32 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 5013aee..43e44d5 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2865,14 +2865,12 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
break;
case 3: // tt
{
- TCGv_ptr r_tsptr;
+ TCGv_ptr r_tsptr = tcg_temp_new_ptr();
- r_tsptr = tcg_temp_new_ptr();
gen_load_trap_state_at_tl(r_tsptr, cpu_env);
- tcg_gen_ld_i32(cpu_tmp32, r_tsptr,
- offsetof(trap_state, tt));
+ tcg_gen_ld32s_tl(cpu_tmp0, r_tsptr,
+ offsetof(trap_state, tt));
tcg_temp_free_ptr(r_tsptr);
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
}
break;
case 4: // tick
@@ -2890,53 +2888,44 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
tcg_gen_mov_tl(cpu_tmp0, cpu_tbr);
break;
case 6: // pstate
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, pstate));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, pstate));
break;
case 7: // tl
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, tl));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, tl));
break;
case 8: // pil
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, psrpil));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, psrpil));
break;
case 9: // cwp
gen_helper_rdcwp(cpu_tmp0, cpu_env);
break;
case 10: // cansave
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, cansave));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, cansave));
break;
case 11: // canrestore
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, canrestore));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, canrestore));
break;
case 12: // cleanwin
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, cleanwin));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, cleanwin));
break;
case 13: // otherwin
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, otherwin));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, otherwin));
break;
case 14: // wstate
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, wstate));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, wstate));
break;
case 16: // UA2005 gl
CHECK_IU_FEATURE(dc, GL);
- tcg_gen_ld_i32(cpu_tmp32, cpu_env,
- offsetof(CPUSPARCState, gl));
- tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
+ tcg_gen_ld32s_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUSPARCState, gl));
break;
case 26: // UA2005 strand status
CHECK_IU_FEATURE(dc, HYPV);
--
1.7.11.7
next prev parent reply other threads:[~2012-10-16 9:33 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-16 9:32 [Qemu-devel] [PATCH v2 00/20] target-sparc: Cleanup handling of temps Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 01/20] target-sparc: Add gen_load/store/dest_gpr Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 02/20] target-sparc: Conversion to gen_*_gpr, part 1 Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 03/20] target-sparc: Use gen_load_gpr in get_src[12] Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 04/20] target-sparc: Convert asi helpers to gen_*_gpr Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 05/20] target-sparc: Convert swap to gen_load/store_gpr Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 06/20] target-sparc: Finish conversion to gen_load_gpr Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 07/20] target-sparc: Cleanup cpu_src[12] allocation Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 08/20] target-sparc: Make the cpu_addr variable local to load/store handling Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 09/20] target-sparc: Split out get_temp_i32 Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 10/20] target-sparc: Use get_temp_i32 in gen_dest_fpr_F Richard Henderson
2012-10-16 9:32 ` Richard Henderson [this message]
2012-10-16 9:32 ` [Qemu-devel] [PATCH 12/20] target-sparc: Avoid cpu_tmp32 in Write Priv Register Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 13/20] target-sparc: Tidy ldfsr, stfsr Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 14/20] target-sparc: Remove usage of cpu_tmp64 from most helper functions Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 15/20] target-sparc: Don't use a temporary for gen_dest_fpr_D Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 16/20] target-sparc: Remove cpu_tmp64 use from softint insns Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 17/20] target-sparc: Remove last uses of cpu_tmp64 Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 18/20] target-sparc: Only use cpu_dst for eventual writes to a gpr Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 19/20] target-sparc: Make cpu_dst local to OP=2 insns Richard Henderson
2012-10-16 9:32 ` [Qemu-devel] [PATCH 20/20] target-sparc: Remove cpu_tmp0 as a global Richard Henderson
2012-10-20 8:48 ` [Qemu-devel] [PATCH v2 00/20] target-sparc: Cleanup handling of temps Blue Swirl
-- strict thread matches above, loose matches on Subject: below --
2012-10-09 22:04 [Qemu-devel] [PATCH " Richard Henderson
2012-10-09 22:04 ` [Qemu-devel] [PATCH 11/20] target-sparc: Avoid cpu_tmp32 in Read Priv Register Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1350379951-17615-12-git-send-email-rth@twiddle.net \
--to=rth@twiddle.net \
--cc=blauwirbel@gmail.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).