From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH 2/2] target-arm: Implement abs_i32 inline rather than as a helper
Date: Thu, 18 Oct 2012 18:26:44 +0100 [thread overview]
Message-ID: <1350581204-24456-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1350581204-24456-1-git-send-email-peter.maydell@linaro.org>
Implement abs_i32 inline (with movcond) rather than using a helper
function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 5 -----
target-arm/helper.h | 1 -
target-arm/translate.c | 10 ++++++++--
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 58340bd..0601760 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1562,11 +1562,6 @@ uint32_t HELPER(rbit)(uint32_t x)
return x;
}
-uint32_t HELPER(abs)(uint32_t x)
-{
- return ((int32_t)x < 0) ? -x : x;
-}
-
#if defined(CONFIG_USER_ONLY)
void do_interrupt (CPUARMState *env)
diff --git a/target-arm/helper.h b/target-arm/helper.h
index fa3472f..60812de 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -13,7 +13,6 @@ DEF_HELPER_2(double_saturate, i32, env, s32)
DEF_HELPER_FLAGS_2(sdiv, TCG_CALL_CONST | TCG_CALL_PURE, s32, s32, s32)
DEF_HELPER_FLAGS_2(udiv, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32, i32)
DEF_HELPER_FLAGS_1(rbit, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
-DEF_HELPER_FLAGS_1(abs, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
#define PAS_OP(pfx) \
DEF_HELPER_3(pfx ## add8, i32, i32, i32, ptr) \
diff --git a/target-arm/translate.c b/target-arm/translate.c
index d33f94c..5a7602a 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -462,8 +462,14 @@ static void gen_sar(TCGv dest, TCGv t0, TCGv t1)
tcg_temp_free_i32(tmp1);
}
-/* FIXME: Implement this natively. */
-#define tcg_gen_abs_i32(t0, t1) gen_helper_abs(t0, t1)
+static void tcg_gen_abs_i32(TCGv dest, TCGv src)
+{
+ TCGv c0 = tcg_const_i32(0);
+ printf("tcg_gen_abs_i32\n");
+ tcg_gen_neg_i32(dest, src);
+ tcg_gen_movcond_i32(TCG_COND_GT, dest, src, c0, src, dest);
+ tcg_temp_free_i32(c0);
+}
static void shifter_out_im(TCGv var, int shift)
{
--
1.7.9.5
next prev parent reply other threads:[~2012-10-18 17:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-18 17:26 [Qemu-devel] [PATCH 0/2] target-arm: inline abs, 64-bit negate Peter Maydell
2012-10-18 17:26 ` [Qemu-devel] [PATCH 1/2] target-arm: Use TCG operation for Neon 64 bit negation Peter Maydell
2012-10-18 17:26 ` Peter Maydell [this message]
2012-10-18 17:40 ` [Qemu-devel] [PATCH 2/2] target-arm: Implement abs_i32 inline rather than as a helper malc
2012-10-18 17:50 ` Peter Maydell
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