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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH] target-sparc: Revert setting cpu_dst to gen_dest_gpr
Date: Mon, 29 Oct 2012 15:50:20 +1100	[thread overview]
Message-ID: <1351486220-26216-1-git-send-email-rth@twiddle.net> (raw)

There is some read-after-write error within the OP=2 insns which
prevents setting cpu_dst to the real output register.  Until this
is found and fixed, always write to a temporary first.

Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 4321393..9e46f14 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2633,7 +2633,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
     case 2:                     /* FPU & Logical Operations */
         {
             unsigned int xop = GET_FIELD(insn, 7, 12);
-            TCGv cpu_dst = gen_dest_gpr(dc, rd);
+            TCGv cpu_dst = get_temp_tl(dc);
             TCGv cpu_tmp0;
 
             if (xop == 0x3a) {  /* generate trap */
-- 
1.7.11.7

             reply	other threads:[~2012-10-29  4:50 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-29  4:50 Richard Henderson [this message]
2012-10-29 13:54 ` [Qemu-devel] [PATCH] target-sparc: Revert setting cpu_dst to gen_dest_gpr Aurelien Jarno
2012-10-30 21:08 ` Blue Swirl

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