From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44433) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSmY7-00085W-Sc for qemu-devel@nongnu.org; Mon, 29 Oct 2012 06:26:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSmXx-0007ZV-7k for qemu-devel@nongnu.org; Mon, 29 Oct 2012 06:26:27 -0400 From: Alexander Graf Date: Mon, 29 Oct 2012 11:25:52 +0100 Message-Id: <1351506371-23632-4-git-send-email-agraf@suse.de> In-Reply-To: <1351506371-23632-1-git-send-email-agraf@suse.de> References: <1351506371-23632-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PATCH 03/22] PPC: 440: Emulate DCBR0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel qemu-devel Cc: Blue Swirl , "qemu-ppc@nongnu.org List" , Aurelien Jarno The DCBR0 register on 440 is used to implement system reset. The same register is used on 405 as well, so just reuse the code. Signed-off-by: Alexander Graf --- target-ppc/translate_init.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a972287..ad54985 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -1498,7 +1498,7 @@ static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask) /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR0, "DBCR0", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_40x_dbcr0, 0x00000000); /* XXX : not implemented */ spr_register(env, SPR_BOOKE_DBCR1, "DBCR1", -- 1.6.0.2