From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:43503) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzRM-00078R-PQ for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSzRL-00059y-77 for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:20 -0400 Received: from hall.aurel32.net ([88.191.126.93]:39625) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSzRL-00059U-0S for qemu-devel@nongnu.org; Mon, 29 Oct 2012 20:12:19 -0400 From: Aurelien Jarno Date: Tue, 30 Oct 2012 01:11:53 +0100 Message-Id: <1351555932-19695-1-git-send-email-aurelien@aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v2 00/19] target-mips: misc fixes and optimizations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aurelien Jarno This patch series does some bug fixes and code cleanup in the MIPS target, and then does some optimizations. Changes v1 -> v2: - patch 1: new patch - patch 2: new patch - patch 5: new patch to address Richard Henders comments - patch 6: update following patch 5 addition - patch 7: new patch to address Richard Henders comments - patch 9: new patch to address Richard Henders comments - patch 16: spare one register by reusing the output of setcond to assign the value 1 - patch 17: remove the buggy (lsb > msb) case - patch 18: fixed indentation -- Aurelien Jarno (19): target-mips: correctly restore btarget upon exception target-mips: do not save CPU state when using retranslation softfloat: implement fused multiply-add NaN propagation for MIPS target-mips: use the softfloat floatXX_muladd functions target-mips: keep softfloat exception set to 0 between instructions target-mips: fix FPU exceptions target-mips: cleanup float to int conversion helpers target-mips: use softfloat constants when possible target-mips: restore CPU state after an FPU exception target-mips: cleanup load/store operations target-mips: optimize load operations target-mips: simplify load/store microMIPS helpers target-mips: implement unaligned loads using TCG target-mips: don't use local temps for store conditional target-mips: implement movn/movz using movcond target-mips: optimize ddiv/ddivu/div/divu with movcond target-mips: use deposit instead of hardcoded version target-mips: fix TLBR wrt SEGMask target-mips: don't flush extra TLB on permissions upgrade fpu/softfloat-specialize.h | 27 ++ target-mips/helper.h | 12 +- target-mips/op_helper.c | 824 ++++++++++++++++---------------------------- target-mips/translate.c | 391 ++++++++++----------- 4 files changed, 520 insertions(+), 734 deletions(-) -- 1.7.10.4