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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v2 15/19] target-mips: implement movn/movz using movcond
Date: Tue, 30 Oct 2012 01:12:08 +0100	[thread overview]
Message-ID: <1351555932-19695-16-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1351555932-19695-1-git-send-email-aurelien@aurel32.net>

Avoid the branches in movn/movz implementation and replace them with
movcond. Also update a wrong command.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/translate.c |   27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 54f309f..5d5c44e 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1904,35 +1904,32 @@ static void gen_cond_move(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
                           int rd, int rs, int rt)
 {
     const char *opn = "cond move";
-    int l1;
+    TCGv t0, t1, t2;
 
     if (rd == 0) {
-        /* If no destination, treat it as a NOP.
-           For add & sub, we must generate the overflow exception when needed. */
+        /* If no destination, treat it as a NOP. */
         MIPS_DEBUG("NOP");
         return;
     }
 
-    l1 = gen_new_label();
+    t0 = tcg_temp_new();
+    gen_load_gpr(t0, rt);
+    t1 = tcg_const_tl(0);
+    t2 = tcg_temp_new();
+    gen_load_gpr(t2, rs);
     switch (opc) {
     case OPC_MOVN:
-        if (likely(rt != 0))
-            tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rt], 0, l1);
-        else
-            tcg_gen_br(l1);
+        tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rd], t0, t1, t2, cpu_gpr[rd]);
         opn = "movn";
         break;
     case OPC_MOVZ:
-        if (likely(rt != 0))
-            tcg_gen_brcondi_tl(TCG_COND_NE, cpu_gpr[rt], 0, l1);
+        tcg_gen_movcond_tl(TCG_COND_EQ, cpu_gpr[rd], t0, t1, t2, cpu_gpr[rd]);
         opn = "movz";
         break;
     }
-    if (rs != 0)
-        tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
-    else
-        tcg_gen_movi_tl(cpu_gpr[rd], 0);
-    gen_set_label(l1);
+    tcg_temp_free(t2);
+    tcg_temp_free(t1);
+    tcg_temp_free(t0);
 
     (void)opn; /* avoid a compiler warning */
     MIPS_DEBUG("%s %s, %s, %s", opn, regnames[rd], regnames[rs], regnames[rt]);
-- 
1.7.10.4

  parent reply	other threads:[~2012-10-30  0:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-30  0:11 [Qemu-devel] [PATCH v2 00/19] target-mips: misc fixes and optimizations Aurelien Jarno
2012-10-30  0:11 ` [Qemu-devel] [PATCH v2 01/19] target-mips: correctly restore btarget upon exception Aurelien Jarno
2012-10-30  0:11 ` [Qemu-devel] [PATCH v2 02/19] target-mips: do not save CPU state when using retranslation Aurelien Jarno
2012-10-30  0:11 ` [Qemu-devel] [PATCH v2 03/19] softfloat: implement fused multiply-add NaN propagation for MIPS Aurelien Jarno
2012-10-30  0:11 ` [Qemu-devel] [PATCH v2 04/19] target-mips: use the softfloat floatXX_muladd functions Aurelien Jarno
2012-10-30  0:11 ` [Qemu-devel] [PATCH v2 05/19] target-mips: keep softfloat exception set to 0 between instructions Aurelien Jarno
2012-10-30  0:11 ` [Qemu-devel] [PATCH v2 06/19] target-mips: fix FPU exceptions Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 07/19] target-mips: cleanup float to int conversion helpers Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 08/19] target-mips: use softfloat constants when possible Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 09/19] target-mips: restore CPU state after an FPU exception Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 10/19] target-mips: cleanup load/store operations Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 11/19] target-mips: optimize load operations Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 12/19] target-mips: simplify load/store microMIPS helpers Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 13/19] target-mips: implement unaligned loads using TCG Aurelien Jarno
2012-10-30 18:59   ` Blue Swirl
2012-10-30 20:00     ` Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 14/19] target-mips: don't use local temps for store conditional Aurelien Jarno
2012-10-30  0:12 ` Aurelien Jarno [this message]
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 16/19] target-mips: optimize ddiv/ddivu/div/divu with movcond Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 17/19] target-mips: use deposit instead of hardcoded version Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 18/19] target-mips: fix TLBR wrt SEGMask Aurelien Jarno
2012-10-30  0:12 ` [Qemu-devel] [PATCH v2 19/19] target-mips: don't flush extra TLB on permissions upgrade Aurelien Jarno
2012-10-31  6:37 ` [Qemu-devel] [PATCH v2 00/19] target-mips: misc fixes and optimizations Richard Henderson

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