From: y@ohm.aurel32.net
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v2 0/3] tcg/arm: misc fixes
Date: Tue, 30 Oct 2012 01:18:10 +0100 [thread overview]
Message-ID: <1351556293-20322-1-git-send-email-y> (raw)
From: Aurelien Jarno <aurelien@aurel32.net>
This patch series fixes the TCG arm backend for the MIPS target, as well
as for big endian targets when not using the ARMv6+ instructions set.
The corresponding patches are candidate for a stable release.
--
Changes v1 -> v2:
- patch 1:
- added an assert to make sure the TLB offset fits within 24 bits
- added an assert to make sure both registers are different in ldr_wb
- patches 4 and 5 (optimizations) have been dropped and will be
resubmitted again (when I can find some time to work on them).
Aurelien Jarno (3):
tcg/arm: fix TLB access in qemu-ld/st ops
tcg/arm: fix cross-endian qemu_st16
target-openrisc: remove conflicting definitions from cpu.h
target-openrisc/cpu.h | 18 ---------
tcg/arm/tcg-target.c | 97 ++++++++++++++++++++++++++++++-------------------
2 files changed, 59 insertions(+), 56 deletions(-)
--
1.7.10.4
next reply other threads:[~2012-10-30 0:18 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-30 0:18 y [this message]
2012-10-30 0:18 ` [Qemu-devel] [PATCH v2 1/3] tcg/arm: fix TLB access in qemu-ld/st ops y
2012-10-30 0:18 ` [Qemu-devel] [PATCH v2 2/3] tcg/arm: fix cross-endian qemu_st16 y
2012-10-30 0:18 ` [Qemu-devel] [PATCH v2 3/3] target-openrisc: remove conflicting definitions from cpu.h y
[not found] <508f1cd6.43d2e00a.262d.ffffe0f3SMTPIN_ADDED@mx.google.com>
2012-10-31 13:39 ` [Qemu-devel] [PATCH v2 0/3] tcg/arm: misc fixes Peter Maydell
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