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From: David Gibson <david@gibson.dropbear.id.au>
To: agraf@suse.de
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 11/16] pseries: Split xics irq configuration from state information
Date: Tue, 30 Oct 2012 14:25:07 +1100	[thread overview]
Message-ID: <1351567512-17278-12-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1351567512-17278-1-git-send-email-david@gibson.dropbear.id.au>

Currently the XICS irq controller code has a per-irq state structure which
amongst other things includes whether the interrupt is level or message
triggered - this is configured by the platform code, and is not directly
visible to the guest.  This leads to a slightly awkward construct at reset
time where we need to reset everything in the state structure _except_ the
lsi/msi flag, which needs to retain the information given at platform init
time.

More importantly this flag will make matching the qemu state to the KVM
state for the upcoming in-kernel XICS implementation more awkward.  This
patch, therefore, removes this flag from the per-irq state structure,
instead adding a parallel array giving the lsi/msi configuration per irq.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/xics.c |   20 ++++++++------------
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/hw/xics.c b/hw/xics.c
index 403afdb..5e20f0f 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -179,13 +179,13 @@ struct ics_irq_state {
 #define XICS_STATUS_REJECTED           0x4
 #define XICS_STATUS_MASKED_PENDING     0x8
     uint8_t status;
-    bool lsi;
 };
 
 struct ics_state {
     int nr_irqs;
     int offset;
     qemu_irq *qirqs;
+    bool *islsi;
     struct ics_irq_state *irqs;
     struct icp_state *icp;
 };
@@ -254,9 +254,8 @@ static void set_irq_lsi(struct ics_state *ics, int srcno, int val)
 static void ics_set_irq(void *opaque, int srcno, int val)
 {
     struct ics_state *ics = (struct ics_state *)opaque;
-    struct ics_irq_state *irq = ics->irqs + srcno;
 
-    if (irq->lsi) {
+    if (ics->islsi[srcno]) {
         set_irq_lsi(ics, srcno, val);
     } else {
         set_irq_msi(ics, srcno, val);
@@ -293,7 +292,7 @@ static void ics_write_xive(struct ics_state *ics, int nr, int server,
 
     trace_xics_ics_write_xive(nr, srcno, server, priority);
 
-    if (irq->lsi) {
+    if (ics->islsi[srcno]) {
         write_xive_lsi(ics, srcno);
     } else {
         write_xive_msi(ics, srcno);
@@ -314,10 +313,8 @@ static void ics_resend(struct ics_state *ics)
     int i;
 
     for (i = 0; i < ics->nr_irqs; i++) {
-        struct ics_irq_state *irq = ics->irqs + i;
-
         /* FIXME: filter by server#? */
-        if (irq->lsi) {
+        if (ics->islsi[i]) {
             resend_lsi(ics, i);
         } else {
             resend_msi(ics, i);
@@ -332,7 +329,7 @@ static void ics_eoi(struct ics_state *ics, int nr)
 
     trace_xics_ics_eoi(nr);
 
-    if (irq->lsi) {
+    if (ics->islsi[srcno]) {
         irq->status &= ~XICS_STATUS_SENT;
     }
 }
@@ -354,7 +351,7 @@ void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi)
 {
     assert(ics_valid_irq(icp->ics, irq));
 
-    icp->ics->irqs[irq - icp->ics->offset].lsi = lsi;
+    icp->ics->islsi[irq - icp->ics->offset] = lsi;
 }
 
 static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,
@@ -515,10 +512,8 @@ static void xics_reset(void *opaque)
         qemu_set_irq(icp->ss[i].output, 0);
     }
 
+    memset(ics->irqs, 0, sizeof(struct ics_irq_state) * ics->nr_irqs);
     for (i = 0; i < ics->nr_irqs; i++) {
-        /* Reset everything *except* the type */
-        ics->irqs[i].server = 0;
-        ics->irqs[i].status = 0;
         ics->irqs[i].priority = 0xff;
         ics->irqs[i].saved_priority = 0xff;
     }
@@ -559,6 +554,7 @@ struct icp_state *xics_system_init(int nr_servers, int nr_irqs)
     ics->nr_irqs = nr_irqs;
     ics->offset = XICS_IRQ_BASE;
     ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state));
+    ics->islsi = g_malloc0(nr_irqs * sizeof(bool));
 
     icp->ics = ics;
     ics->icp = icp;
-- 
1.7.10.4

  parent reply	other threads:[~2012-10-30  3:24 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-30  3:24 [Qemu-devel] [0/16] pseries and PPC pending patches David Gibson
2012-10-30  3:24 ` [Qemu-devel] [PATCH 01/16] Revert "PPC: pseries: Remove hack for PIO window" David Gibson
2012-10-30  3:24 ` [Qemu-devel] [PATCH 02/16] target-ppc: Rework storage of VPA registration state David Gibson
2012-11-01 10:10   ` Alexander Graf
2012-11-02  2:07     ` [Qemu-devel] [Qemu-ppc] " David Gibson
2012-10-30  3:24 ` [Qemu-devel] [PATCH 03/16] target-ppc: Extend FPU state for newer POWER CPUs David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 04/16] pseries: Clean up inconsistent variable name in xics.c David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 05/16] pseries: Use #define for XICS base irq number David Gibson
2012-11-01 10:15   ` Alexander Graf
2012-11-02  2:12     ` David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 06/16] pseries: Cleanup duplications of ics_valid_irq() code David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 07/16] pseries: Move XICS initialization before cpu initialization David Gibson
2012-11-01 10:22   ` Alexander Graf
2012-10-30  3:25 ` [Qemu-devel] [PATCH 08/16] pseries: Return the token when we register an RTAS call David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 09/16] pseries: Allow RTAS tokens without a qemu handler David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 10/16] pseries: Add tracepoints to the XICS interrupt controller David Gibson
2012-10-30  3:25 ` David Gibson [this message]
2012-10-30  3:25 ` [Qemu-devel] [PATCH 12/16] target-pcc: Convert ppcemb_tlb_t to use fixed 64-bit RPN David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 13/16] pseries: Implement PAPR NVRAM David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 14/16] pseries: Update SLOF for NVRAM support David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 15/16] pseries: Fix bug in PCI MSI allocation David Gibson
2012-10-30  3:25 ` [Qemu-devel] [PATCH 16/16] pseries: Generate unique LIOBNs for PCI host bridges David Gibson
2012-11-01 10:26 ` [Qemu-devel] [0/16] pseries and PPC pending patches Alexander Graf

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