From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59048) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTObJ-000855-9G for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:04:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TTObH-0004Nz-Oc for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:04:17 -0400 Received: from cantor2.suse.de ([195.135.220.15]:55001 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTObH-0004NH-3R for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:04:15 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 31 Oct 2012 04:03:59 +0100 Message-Id: <1351652644-18687-3-git-send-email-afaerber@suse.de> In-Reply-To: <1351652644-18687-1-git-send-email-afaerber@suse.de> References: <1351652644-18687-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 2/7] target-alpha: Turn CPU definitions into subclasses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , rth@twiddle.net Make TYPE_ALPHA_CPU abstract and default to creating type "ev67". Signed-off-by: Andreas F=C3=A4rber --- target-alpha/cpu.c | 157 ++++++++++++++++++++++++++++++++++++++++= +++++- target-alpha/translate.c | 49 +++------------ 2 Dateien ge=C3=A4ndert, 163 Zeilen hinzugef=C3=BCgt(+), 43 Zeilen entfe= rnt(-) diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 11a19eb..e1a5739 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -23,6 +23,145 @@ #include "qemu-common.h" =20 =20 +/* Models */ + +static void ev4_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_2106x; +} + +static void ev5_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21164; +} + +static void ev56_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21164; + env->amask =3D AMASK_BWX; +} + +static void pca56_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21164; + env->amask =3D AMASK_BWX | AMASK_MVI; +} + +static void ev6_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21264; + env->amask =3D AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP; +} + +static void ev67_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21264; + env->amask =3D AMASK_BWX | AMASK_FIX | AMASK_CIX | AMASK_MVI | AMASK= _TRAP | + AMASK_PREFETCH; +} + +static void ev68_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21264; + env->amask =3D AMASK_BWX | AMASK_FIX | AMASK_CIX | AMASK_MVI | AMASK= _TRAP | + AMASK_PREFETCH; +} + +static void alpha_21064_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_2106x; +} + +static void alpha_21164_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21164; +} + +static void alpha_21164a_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21164; + env->amask =3D AMASK_BWX; +} + +static void alpha_21164pc_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21164; + env->amask =3D AMASK_BWX | AMASK_MVI; +} + +static void alpha_21264_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21264; + env->amask =3D AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP; +} + +static void alpha_21264a_cpu_initfn(Object *obj) +{ + AlphaCPU *cpu =3D ALPHA_CPU(obj); + CPUAlphaState *env =3D &cpu->env; + + env->implver =3D IMPLVER_21264; + env->amask =3D AMASK_BWX | AMASK_FIX | AMASK_CIX | AMASK_MVI | AMASK= _TRAP | + AMASK_PREFETCH; +} + +typedef struct AlphaCPUInfo { + const char *name; + void (*initfn)(Object *obj); +} AlphaCPUInfo; + +static const AlphaCPUInfo alpha_cpus[] =3D { + { .name =3D "ev4", .initfn =3D ev4_cpu_initfn }, + { .name =3D "ev5", .initfn =3D ev5_cpu_initfn }, + { .name =3D "ev56", .initfn =3D ev56_cpu_initfn }, + { .name =3D "pca56", .initfn =3D pca56_cpu_initfn }, + { .name =3D "ev6", .initfn =3D ev6_cpu_initfn }, + { .name =3D "ev67", .initfn =3D ev67_cpu_initfn }, + { .name =3D "ev68", .initfn =3D ev68_cpu_initfn }, + { .name =3D "21064", .initfn =3D alpha_21064_cpu_initfn }, + { .name =3D "21164", .initfn =3D alpha_21164_cpu_initfn }, + { .name =3D "21164a", .initfn =3D alpha_21164a_cpu_initfn }, + { .name =3D "21164pc", .initfn =3D alpha_21164pc_cpu_initfn }, + { .name =3D "21264", .initfn =3D alpha_21264_cpu_initfn }, + { .name =3D "21264a", .initfn =3D alpha_21264a_cpu_initfn }, +}; + static void alpha_cpu_initfn(Object *obj) { AlphaCPU *cpu =3D ALPHA_CPU(obj); @@ -41,18 +180,34 @@ static void alpha_cpu_initfn(Object *obj) env->fen =3D 1; } =20 +static void alpha_cpu_register(const AlphaCPUInfo *info) +{ + TypeInfo type_info =3D { + .name =3D info->name, + .parent =3D TYPE_ALPHA_CPU, + .instance_init =3D info->initfn, + }; + + type_register_static(&type_info); +} + static const TypeInfo alpha_cpu_type_info =3D { .name =3D TYPE_ALPHA_CPU, .parent =3D TYPE_CPU, .instance_size =3D sizeof(AlphaCPU), .instance_init =3D alpha_cpu_initfn, - .abstract =3D false, + .abstract =3D true, .class_size =3D sizeof(AlphaCPUClass), }; =20 static void alpha_cpu_register_types(void) { + int i; + type_register_static(&alpha_cpu_type_info); + for (i =3D 0; i < ARRAY_SIZE(alpha_cpus); i++) { + alpha_cpu_register(&alpha_cpus[i]); + } } =20 type_init(alpha_cpu_register_types) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index f707d8d..6ee031d 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -3493,56 +3493,21 @@ void gen_intermediate_code_pc (CPUAlphaState *env= , struct TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } =20 -struct cpu_def_t { - const char *name; - int implver, amask; -}; - -static const struct cpu_def_t cpu_defs[] =3D { - { "ev4", IMPLVER_2106x, 0 }, - { "ev5", IMPLVER_21164, 0 }, - { "ev56", IMPLVER_21164, AMASK_BWX }, - { "pca56", IMPLVER_21164, AMASK_BWX | AMASK_MVI }, - { "ev6", IMPLVER_21264, AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_= TRAP }, - { "ev67", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX - | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), }, - { "ev68", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX - | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), }, - { "21064", IMPLVER_2106x, 0 }, - { "21164", IMPLVER_21164, 0 }, - { "21164a", IMPLVER_21164, AMASK_BWX }, - { "21164pc", IMPLVER_21164, AMASK_BWX | AMASK_MVI }, - { "21264", IMPLVER_21264, AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_= TRAP }, - { "21264a", IMPLVER_21264, (AMASK_BWX | AMASK_FIX | AMASK_CIX - | AMASK_MVI | AMASK_TRAP | AMASK_PREFETCH), } -}; - -CPUAlphaState * cpu_alpha_init (const char *cpu_model) +CPUAlphaState *cpu_alpha_init(const char *cpu_model) { AlphaCPU *cpu; CPUAlphaState *env; - int implver, amask, i, max; + const char *typename =3D cpu_model; =20 - cpu =3D ALPHA_CPU(object_new(TYPE_ALPHA_CPU)); + if (object_class_by_name(typename) =3D=3D NULL) { + /* Default to ev67; no reason not to emulate insns by default. = */ + typename =3D "ev67"; + } + cpu =3D ALPHA_CPU(object_new(typename)); env =3D &cpu->env; =20 alpha_translate_init(); =20 - /* Default to ev67; no reason not to emulate insns by default. */ - implver =3D IMPLVER_21264; - amask =3D (AMASK_BWX | AMASK_FIX | AMASK_CIX | AMASK_MVI - | AMASK_TRAP | AMASK_PREFETCH); - - max =3D ARRAY_SIZE(cpu_defs); - for (i =3D 0; i < max; i++) { - if (strcmp (cpu_model, cpu_defs[i].name) =3D=3D 0) { - implver =3D cpu_defs[i].implver; - amask =3D cpu_defs[i].amask; - break; - } - } - env->implver =3D implver; - env->amask =3D amask; env->cpu_model_str =3D cpu_model; =20 qemu_init_vcpu(env); --=20 1.7.10.4