From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59031) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTObI-00081g-4p for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:04:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TTObG-0004Ni-K2 for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:04:15 -0400 Received: from cantor2.suse.de ([195.135.220.15]:55003 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTObG-0004NX-Aw for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:04:14 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 31 Oct 2012 04:04:00 +0100 Message-Id: <1351652644-18687-4-git-send-email-afaerber@suse.de> In-Reply-To: <1351652644-18687-1-git-send-email-afaerber@suse.de> References: <1351652644-18687-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 3/7] target-alpha: Add support for -cpu ? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , rth@twiddle.net Implement alphabetical listing of CPU subclasses. Signed-off-by: Andreas F=C3=A4rber --- target-alpha/cpu.c | 41 +++++++++++++++++++++++++++++++++++++++++ target-alpha/cpu.h | 4 +++- 2 Dateien ge=C3=A4ndert, 44 Zeilen hinzugef=C3=BCgt(+), 1 Zeile entfernt= (-) diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index e1a5739..ab25c44 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -23,6 +23,47 @@ #include "qemu-common.h" =20 =20 +typedef struct AlphaCPUListState { + fprintf_function cpu_fprintf; + FILE *file; +} AlphaCPUListState; + +/* Sort alphabetically by type name. */ +static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b) +{ + ObjectClass *class_a =3D (ObjectClass *)a; + ObjectClass *class_b =3D (ObjectClass *)b; + const char *name_a, *name_b; + + name_a =3D object_class_get_name(class_a); + name_b =3D object_class_get_name(class_b); + return strcmp(name_a, name_b); +} + +static void alpha_cpu_list_entry(gpointer data, gpointer user_data) +{ + ObjectClass *oc =3D data; + AlphaCPUListState *s =3D user_data; + + (*s->cpu_fprintf)(s->file, " %s\n", + object_class_get_name(oc)); +} + +void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf) +{ + AlphaCPUListState s =3D { + .file =3D f, + .cpu_fprintf =3D cpu_fprintf, + }; + GSList *list; + + list =3D object_class_get_list(TYPE_ALPHA_CPU, false); + list =3D g_slist_sort(list, alpha_cpu_list_compare); + (*cpu_fprintf)(f, "Available CPUs:\n"); + g_slist_foreach(list, alpha_cpu_list_entry, &s); + g_slist_free(list); +} + /* Models */ =20 static void ev4_cpu_initfn(Object *obj) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 8f131b7..28999ab 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -298,6 +298,7 @@ struct CPUAlphaState { }; =20 #define cpu_init cpu_alpha_init +#define cpu_list alpha_cpu_list #define cpu_exec cpu_alpha_exec #define cpu_gen_code cpu_alpha_gen_code #define cpu_signal_handler cpu_alpha_signal_handler @@ -434,7 +435,8 @@ enum { IR_ZERO =3D 31, }; =20 -CPUAlphaState * cpu_alpha_init (const char *cpu_model); +CPUAlphaState *cpu_alpha_init(const char *cpu_model); +void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); int cpu_alpha_exec(CPUAlphaState *s); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero --=20 1.7.10.4